Welcome to the World of Single-Slope Column-Level Analog-to-Digital Converters for CMOS Image Sensors 1

This monograph introduces the reader into basic and advanced aspects of single-slope analog-to-digital converters (SS-ADC) applied in solid-state image sensors. CMOS image sensors (CIS) have come a long way from the late 1980s and early 1990s up to where they are today. However, already since the very first developments in the field, column-level single-slope analog-to-digital converters (SS-ADC) were incorporated. The combination of an image sensor with on-chip column-level ADCs demonstrates exceptional performance as far as speed and power are concerned. It is not only the imaging array that went through a lot of new developments, so did the SS-ADC configuration. This monograph gives an overview and background of the various developments of the SS-ADCs. In Part I, some background information is given about the general CIS architecture, the CIS pixels and the noise sources present in a CIS. Part of this general technical information is used in the remaining section. Part II describes the various architectures used in a SS-ADC, starting with the most simple and earliest device described to the more complex architectures that include additional features in the ADC. After the description of the overall structure of the SS-ADCs, in Part III more details are studied about the various building blocks that are used in the SS-ADCs, such as amplifiers, comparators, ramp generators and counters. The monograph concludes with a future outlook, included in Part IV. Introduction Nice to Know and Need to Know CMOS Image Sensor Architecture CMOS Pixels Noise Sources in a CMOS Pixel Correlated-Double Sampling Motivation to Use a Column-Level Analog-to-Digital Converter Single-Slope ADC Architectures Concept of the Single-Slope Analog-to-Digital Converter Photon Shot Noise in an Image Sensor Multi-Slope ADC Multi-Ramp SS-ADC Multi-Slope, Multi-Ramp ADC Counting Single-Slope ADC Counting SS-ADC with Digital Correlated Double Sampling Counting SS-ADC with Correlated Multiple Sampling Counter-Based ADC with Sawtooth Reference Signal Time-Stretched SS-ADC Circuit Elements CDS Pre-Amplifier Comparator Ramp Generator Column ADC Counters Column ADC Power Breakdown Future Outlook Summary and Conclusions References