VLSI-SOC, from systems to chips : IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany

International Federation For Information Processing The Ifip Series Publishes State-of-the-art Results In The Sciences And Technologies Of Information And Communication. The Scope Of The Series Includes: Foundations Of Computer Science; Software Theory And Practice; Education; Computer Applications In Technology; Communication Systems; Systems Modeling And Optimization; Information Systems; Computers And Society; Computer Systems Technology; Security And Protection In Information Processing Systems; Artificial Intelligence; And Human-computer Interaction. Proceedings And Post-proceedings Of Referred International Conferences In Computer Science And Interdisciplinary Fields Are Featured. These Results Often Precede Journal Publication And Represent The Most Current Research. The Principal Aim Of The Ifip Series Is To Encourage Education And The Dissemination And Exchange Of Information About All Aspects Of Computing. For More Information About The 300 Other Books In The Ifip Series, Please Visit Www.springeronline.com. For More Information About Ifip, Please Visit Www.ifip.org. Effect Of Power Optimizations On Soft Error Rate -- Dynamic Models For Substrate Coupling In Mixed-mode Systems -- Hinoc: A Hierarchical Generic Approach For On-chip Communication, Testing And Debugging Of Socs -- Automated Conversion Of Systemc Fixed-point Data Types -- Exploration Of Sequential Depth By Evolutionary Algorithms -- Validation Of Asynchronous Circuit Specifications Using If/cadp -- On-chip Property Verification Using Assertion Processors -- Run-time Fpga Reconfiguration For Power-/cost-optimized Real-time Systems -- A Switched Opamp Based 10 Bits Integrated Adc For Ultra Low Power Applications -- Exploring The Capabilities Of Reconfigurable Hardware For Ofdm-based Wlans -- Software-based Test For Nonprogrammable Cores In Bus-based System-on-chip Architectures -- Optimizing Soc Test Resources Using Dual Sequences -- A Novel Full Automatic Layout Generation Strategy For Static Cmos Circuits -- Low Power Java Processor For Embedded Applications -- Impact Of Gate Leakage On Efficiency Of Circuit Block Switch-off Schemes -- Evaluation Methodology For Single Electron Encoded Threshold Logic Gates -- Asynchronous Integration Of Coarse-grained Reconfigurable Xpp-arrays Into Pipelined Risc Processor Datapath -- Gray Encoded Arithmetic Operators Applied To Fft And Fir Dedicated Datapaths -- Stuck-at-fault Testability Of Spp Three-level Logic Forms. Edited By Manfred Glesner, Ricardo Reis, Leandro Indrusiak, Vincent Mooney, Hans Eveking. This book contains extended and revised versions of the best papers that have been presented during the twelfth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a Global System-on-a-Chip Design & CAD Conference. The 12• edition was held at the Lufthansa Training Center in Seeheim-Jugenheim, south of Darmstadt, Germany (December 1-3, 2003). Previous conferences have taken place in Edinburgh (81), Trondheim (83), Tokyo (85), Vancouver (87), Munich (89), Edinburgh (91), Grenoble (93), Tokyo (95), Gramado (97), Lisbon (99)andMontpellier(01). The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5, is to provide a forum to exchange ideas and show research results in the field of microelectronics design. The current trend toward increasing chip integration brings about exhilarating new challenges both at the physical and system-design levels: this conference aims to address these exciting new issues. The 2003 edition of VLSI-SoC conserved the traditional structure, which has been successful in previous editions. The quality of submissions (142 papers) made the selection process difficult, but finally 57 papers and 14 posters were accepted for presentation in VLSI-SoC 2003. Submissions came from Austria, Bulgaria, Brazil, Canada, Egypt, England, Estonia, Finland, France, Germany, Greece, Hungary, India, Iran, Israel, Italy, Japan, Korea, Malaysia, Mexico, Netherlands, Poland, Portugal, Romania, Spain, Sweden, Taiwan and the United States of America. From 57 papers presented at the conference, 18 were selected to have an extended and revised version included in this book. Effect of Power Optimizations on Soft Error Rate....Pages 1-20 Dynamic Models for Substrate Coupling in Mixed-Mode Systems....Pages 21-37 Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs....Pages 39-54 Automated Conversion of SystemC Fixed-Point Data Types....Pages 55-72 Exploration of Sequential Depth by Evolutionary Algorithms....Pages 73-83 Validation of Asynchronous Circuit Specifications Using IF/CADP....Pages 85-100 On-Chip Property Verification Using Assertion Processors....Pages 101-117 Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems....Pages 119-132 A Switched Opamp Based 10 Bits Integrated ADC for Ultra Low Power Applications....Pages 133-147 Exploring the Capabilities of Reconfigurable Hardware for OFDM-Based Wlans....Pages 149-164 Software-Based Test for Nonprogrammable Cores in Bus-Based System-On-Chip Architectures....Pages 165-179 Optimizing SOC Test Resources Using Dual Sequences....Pages 181-196 A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits....Pages 197-211 Low Power Java Processor for Embedded Applications....Pages 213-228 Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes....Pages 229-245 Evaluation Methodology for Single Electron Encoded Threshold Logic Gates....Pages 247-262 Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor Datapath....Pages 263-279 Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths....Pages 281-297 Stuck-At-Fault Testability of SPP Three-Level Logic Forms....Pages 299-313 This monograph, divided into four parts, presents a comprehensive treatment and systematic examination of cycle spaces of flag domains. Assuming only a basic familiarity with the concepts of Lie theory and geometry, this work presents a complete structure theory for these cycle spaces, as well as their applications to harmonic analysis and algebraic geometry. Key features include: accessible to readers from a wide range of fields, with all the necessary background material provided for the nonspecialist; many new results presented for the first time; driven by numerous examples; the exposition is presented from the complex geometric viewpoint, but the methods, applications and much of the motivation also come from real and complex algebraic groups and their representations, as well as other areas of geometry; comparisons with classical Barlet cycle spaces are given; and good bibliography and index. Researchers and graduate students in differential geometry, complex analysis, harmonic analysis, representation theory, transformation groups, algebraic geometry, and areas of global geometric analysis will benefit from this work

this Book Presents Extended And Revised Versions Of The Best Papers That Were Presented During The Twelfth Edition Of The Ifip Tc10 Working Group 10.5 International Conference On Very Large Scale Integration. The Purpose Of This Conference Was To Provide A Forum To Exchange Ideas And Show Research Results In The Field Of Microelectronics Design. The Current Trend Toward Increasing Chip Integration Brings About Exhilarating New Challenges Both At The Physical And System-design Levels. This Book Aims To Address These Exciting Issues.