سنتز سطح بالا مستقل از ابزار - با مقایسه بین Mentor Catapult و Cadence Stratus

Introduction Background Objectives and Questions Methodology Contribution State of the Art Increasing abstraction levels Benefits and drawbacks of HLS An Altered Workflow System C HLS tools Methodology FIR filter example block Catapult Workflow Conversion of Codebase Simulation Synthesis Environments Results AC types in Stratus Verification of functionality using ARM SoC Designer Data type simulation speed High-Level Synthesis using Cadence Stratus and Mentor Graphics Catapult Logic Synthesis Using Cadence Genus Discussion Simulation speed Bit accurate data types in Catapult and Stratus Components placed by the HLS tools Genus Synthesis Results Area approximations Conclusion Return to the Research Questions Guidelines and Recommendations Future work