Reconfigurable Cryptographic Processor

"This book focuses on the design methods for reconfigurable computing processors for cryptographic algorithms. It covers the dynamic reconfiguration analysis of cryptographic algorithms, hardware architecture design, and compilation techniques for reconfigurable cryptographic processors, and also presents a case study of implementing the reconfigurable cryptographic processor "Anole" designed by the authors' team. Moreover, it features discussions on countermeasures against physical attacks utilizing partially and dynamically reconfigurable array architecture to enhance security, as well as the latest trends for reconfigurable cryptographic processors. This book is intended for research scientists, graduate students, and engineers in electronic science and technology, cryptography, network and information security, as well as computer science and technology"-- Proporcionat per l'editor Foreword 5 Preface 8 Contents 12 1 Introduction 15 1.1 Information Security and Cryptographic Processor 16 1.2 Challenges of Cryptographic Processor Application Requirements 20 1.3 Traditional Cryptographic Processors 30 1.3.1 ASIC Cryptographic Processors 30 1.3.2 ISAP Cryptographic Processors 46 1.3.3 Limitation of Traditional Cryptographic Processors 55 1.4 Reconfigurable Cryptographic Processors 57 1.4.1 Overview of Reconfigurable Computing 57 1.4.2 Reconfigurable Cryptographic Processors 72 References 90 2 Analysis of the Reconfiguration Feature of Cryptographic Algorithms 96 2.1 Review and Classification of Cryptographic Algorithms 96 2.2 Symmetric Cryptographic Algorithm 106 2.2.1 Block Cipher Algorithm 106 2.2.2 Stream Ciphers 118 2.3 Hash Algorithms 128 2.3.1 Introduction to Hash Algorithms 128 2.3.2 Features of Hash Algorithms 130 2.3.3 Common Logic of Hash Algorithms 134 2.3.4 Parallelism of Hash Algorithms 136 2.4 Public-Key Ciphers 137 2.4.1 Introduction to Public-Key Ciphers 137 2.4.2 Features of Public-Key Ciphers 140 2.4.3 Common Logic of Public-Key Ciphers 141 2.4.4 Parallelism of Public-Key Ciphers 143 References 145 3 Hardware Architecture of Reconfigurable Cryptographic Processors 146 3.1 Reconfigurable Datapath 146 3.1.1 Reconfigurable Computing Unit 147 3.1.2 Interconnection Network 157 3.1.3 Data Storage 163 3.1.4 Heterogeneous Module 165 3.2 Reconfigurable Controller 167 3.2.1 Configuration Control Methods 167 3.2.2 Control State Machine 171 3.2.3 Configuration Information Organization and Storage 173 References 179 4 Compilation Method of Reconfigurable Cryptographic Processors 181 4.1 General Compilation Methods for Reconfigurable Computing Processors 182 4.2 Compilation Methods of a Reconfigurable Cryptographic Processors 191 4.2.1 Code Transformation and Optimization 191 4.2.2 IR Partition and Mapping 202 4.3 Compilation Examples of a Reconfigurable Cryptographic Processor 206 4.3.1 Implementation Examples of Symmetric Cryptographic Algorithm 207 4.3.2 Examples of Hash Algorithm Implementation 209 4.3.3 Examples of the Public-Key Cipher Algorithm Implementation 212 References 221 5 Examples of Reconfigurable Cryptographic Processor Design 224 5.1 Basic Architecture of the Processor Anole 224 5.1.1 Reconfigurable Computing Datapath 224 5.1.2 Design of the Reconfigurable Computing Controller 230 5.2 Key Technologies of Anole Processors 230 5.2.1 DCN 231 5.2.2 Concurrent Computation and Reconfiguration (CCR) 236 5.2.3 Configuration Compression and Organization (CCO) 238 5.3 Integrated Development Tools of Anole 240 5.3.1 Introduction to the Tools 241 5.3.2 Configuration Method 242 5.3.3 Demonstration Cases 249 5.4 Analysis of the Implementation Results of the Anole Processor 256 5.4.1 Implementation Results of the Chip 256 5.4.2 Chip Performance Comparison 257 References 260 6 Physical Attack Countermeasures for Reconfigurable Cryptographic Processors 263 6.1 Countermeasures Based on Time and Spatial Randomization 264 6.1.1 Fault Attack Countermeasure Based on Randomization Technologies 264 6.1.2 Randomization-Based Electromagnetic Attack Countermeasure Technology 283 6.2 Attack Countermeasure Technology of the Reconfigurable Processing Element Array 308 6.2.1 Processing Element-Based PUF Technology 309 6.2.2 Network-Based Attack Countermeasure Technology 324 References 340 7 Outlook of Reconfigurable Cryptographic Processing Application Technology 344 7.1 Fully Homomorphic Encryption and Reconfigurable Computing 345 7.1.1 Concept and Application of Fully Homomorphic Encryption 347 7.1.2 History and Status of Fully Homomorphic Encryption 349 7.1.3 Fully Homomorphic Encryption Based on Reconfigurable Computing 356 7.2 Hardware Trojans and Reconfigurable Computing 369 7.2.1 Classification and Examples of Hardware Trojans 370 7.2.2 Defense Technology of Hardware Trojan 375 7.2.3 Hardware Trojan Threat Countermeasures for Reconfigurable Computing 381 References 390 Afterword 394