Reconfigurable Computing: Architectures, Tools And Applications: 9th International Symposium, Arc 2013, Los Angeles, Ca, Usa, March 25-27, 2013, Proceedings (lecture Notes In Computer Science)

This book constitutes the thoroughly refereed conference proceedings of the 9th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2013, held in Los Angeles, CA, USA, in March 2013. The 28 revised papers presented, consisting of 20 full papers and 11 poster papers were carefully selected from 41 submissions. The topics covered are applications, arithmetic, design optimization for FPGAs, architectures, place and routing. Front Matter....Pages - Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications....Pages 1-12 Hardware Acceleration of Genetic Sequence Alignment....Pages 13-24 An FPGA Acceleration for the Kd-tree Search in Photon Mapping....Pages 25-36 SEU Resilience of DES, AES and Twofish in SRAM-Based FPGA....Pages 37-46 A Fast Poisson Solver for Hybrid Reconfigurable System....Pages 47-58 An Architecture for IPv6 Lookup Using Parallel Index Generation Units....Pages 59-71 Hardware Index to Set Partition Converter....Pages 72-83 Teaching SoC Using Video Games to Improve Student Engagement....Pages 84-89 Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-Based Custom Computing....Pages 90-102 Hardware Acceleration of Matrix Multiplication over Small Prime Finite Fields....Pages 103-114 Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms....Pages 115-121 Architecture for Transparent Binary Acceleration of Loops with Memory Accesses....Pages 122-133 Parametric Optimization of Reconfigurable Designs Using Machine Learning....Pages 134-145 Performance Modeling of Pipelined Linear Algebra Architectures on FPGAs....Pages 146-153 Fast Template-Based Heterogeneous MPSoC Synthesis on FPGA....Pages 154-166 Configurable Fault-Tolerance for a Configurable VLIW Processor....Pages 167-178 Hierarchical and Multiple Switching NoC with Floorplan Based Adaptability....Pages 179-184 HTR: On-Chip Hardware Task Relocation for Partially Reconfigurable FPGAs....Pages 185-196 Performance Analysis and Optimization of High Density Tree-Based 3D Multilevel FPGA....Pages 197-209 Iterative Routing Algorithm of Inter-FPGA Signals for Multi-FPGA Prototyping Platform....Pages 210-217 Dependability-Increasing Method of Processors under a Space Radiation Environment....Pages 218-218 Ant Colony Optimization for Application Mapping in Coarse-Grained Reconfigurable Array....Pages 219-219 C-Based Adaptive Stream Processing on Dynamically Reconfigurable Hardware: A Case Study on Window Join....Pages 220-220 Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist....Pages 221-221 Pipeline Optimization for Loops on Reconfigurable Platform....Pages 222-222 FPGA-Based Adaptive Data Acquisition Scheduler-on-Chip (SchoC) for Heterogeneous Signals....Pages 223-223 High Level FPGA Modeling of an JPEG Encoder....Pages 224-224 Empirical Evaluation of Fixed-Point Arithmetic for Deep Belief Networks....Pages 225-225 Deriving Resource Efficient Designs Using the REFLECT Aspect-Oriented Approach....Pages 226-228 Embedded Reconfigurable Architectures....Pages 229-230 Algorithm Design Methodology for Embedded Architectures....Pages 231-232 Efficient Hardware Based Security Algorithm Implementation for WSN Medical Applications: The ARMOR Perspective....Pages 233-234 Coarse Grained Parallelism Optimization for Multicore Architectures: The ALMA Project Approach....Pages 235-236 Back Matter....Pages - This book constitutes the thoroughly refereed conference proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2014, held in Vilamoura, Portugal, in April 2014.