Power Trade-offs and Low Power in Analog CMOS ICs (THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND (The Springer International Series in Engineering and Computer Science)
معرفی کتاب «Power Trade-offs and Low Power in Analog CMOS ICs (THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND (The Springer International Series in Engineering and Computer Science)» نوشتهٔ Mihai A. T. Sanduleanu, Ed A. J. M. van Tuijl, Mihai A.T. Sanduleanu, Ed A.J.M. van Tuijl، منتشرشده توسط نشر Springer London در سال 2002. این کتاب در فرمت pdf، زبان انگلیسی ارائه شده است.
The work presented in Power Trade-offs and Low Power in Analog CMOS ICs concerns power, noise and accuracy in CMOS Analog IC Design. In the presented material it is shown that power, noise and accuracy should be treated in an unitary way, the three terms being well inter-related. The book is divided in a theoretical part which covers sub-micron digital and sub-micron analog followed by an applicative part where accuracy related power and noise related power is encountered. The main part of the book deals with analog circuits working in a digital environment where the process has been optimized for digital applications. The general trend, in digital, to scale down the power supply makes the process of designing analog circuits a difficult task since most of the solutions valid for large supply voltages are not anymore useful due to the low voltage limitations. At low supply voltage, the key problem of analog signal processing functions is dynamic range reduction. In all cases this yields in an increase of power consumption. Besides, analog designers have to cope with second order effects generated by the incompatibility of the process with analog performance. To get the best performance, knowing the limits of power in analog circuits and clearly defining the environment where analog circuits should work is a must. Starting from fundamental/physical limits we are discussing the practical limits of power in digital, mostly at the architecture level and practical limits of power in analog at circuit and architecture level. The fundamental limits are asymptotic limits and they cannot provide realistic comparisons between possible solutions. That is why the approach here provides a step further into power analysis by discussing all possible practical specs related to power at circuit and architecture level. For analog circuits Dynamic-Range\*Speed product is limited by power, topology and supply voltage regardless of the type of circuits: continuous time or sampled data, current-mode or voltage mode. The enormous rise of digital applications in the last two decades arouses the suggestion that analog techniques will lose their importance. However in applications that work with digital signals analog techniques are still very important for a number of reasons. First the signal that must be processed or stored may be analog at the input and output of the system. Second when digital circuits must operate at high speed the analog behavior becomes important again. And third when only limited bandwidth and signal to noise ratio is available the theoretical maximum data rate is determined by Shannon's law. This theoretical limit can only be approximated in practice when complex modulation schemes are used, and after this modulation process the signal is analog again. Of course this does effect the tremendous advantage of digital signals compared to analog signals. Where analog signals deteriorate every time they are processed or stored, digital signals can be recovered perfectly when they are tailored to the properties of the system they are used for. The accuracy of digital signal processing is only limited by practical constraints and many digital signals can be compressed very effective so that after compression they use less bandwidth then their analog counterparts. In any aplication there will thus be analog and digital parts and often the choice has to be made if an analog or a digital solution is preferred for a certain function. 1. Introduction -- 2. Power Considerations In Sub-micron Digital Cmos -- 3. Power Considerations In Sub-micron Analog Cmos -- 4. Gm-c Integrators For Low-power And Low Voltage Applications. A Gaussian Polyphase Filter For Mobile Transceivers In 0.35 [mu]m Cmos -- 5. Chopping: A Technique For Noise And Offset Reduction -- 6. Low-noise, Low Residual Offset, Chopped Amplifiers For High-end Applications -- 7. A 16-bit D/a Interface With Sinc Approximated Semidigital Reconstruction Filter -- 8. Conclusions. By Mihai A.t. Sanduleanu And Ed A.j.m. Van Tuijl. Includes Bibliographical References And Index. The work presented in this book concerns power, noise and accuracy in CMOS Analogue IC Design. It is divided into a theoretical part which covers sub-micron digital and sub-micron analogue followed by an applicative part where accuracy related power and noise related power is encountered This volume concerns power, noise and accuracy in CMOS Analog IC Design. The authors show that power, noise and accuracy should be treated in a unitary way, as the three are inter-related. The book discusses all possible practical power-related specs at circuit and architecture level. From a historical point of view, VLSI designers have used the speed as a performance figure in comparing different designs [1], [2].
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