Nonlinear Design: FETs and HEMTs (Microwave)

Despite its continuing popularity, the so-called standard circuit model of compound semiconductor field-effect transistors (FETs) and high electron mobility transistors (HEMTs) is shown to have a limitation for nonlinear analysis and design: it is valid only in the static limit. When the voltages and currents are time-varying, as they must be for these devices to have any practical use, the model progressively fails for higher specification circuits. This book shows how to reform the standard model to render it fully compliant with the way FETs and HEMTs actually function, thus rendering it valid dynamically. Proof-of-principle is demonstrated for several practical circuits, including a frequency doubler and amplifiers with demanding performance criteria. Methods for extracting both the reformulated model and the standard model are described, including a scheme for re-constructing from S-parameters the bias-dependent dynamic (or RF) I(V) characteristics along which devices work in real-world applications, and as needed for the design of nonlinear circuits using harmonic-balance and time-domain simulators. The book includes a historical review of how variations on the standard model theme evolved, leading up to one of the most widely used―the Angelov (or Chalmers) model. Nonlinear Design: FETs and HEMTs Contents Preface Acknowledgments Introduction Part I Chapter 1 Introduction 1.1 The Statement of the Problem 1.2 Verifying the Approach in MMIC Design: GaAs FETs and HEMTs 1.3 Aims of the Present Work 1.3.1 Motivation and Practical Application 1.3.2 The Physics-to-CircuitModel Construct 1.3.3 Applicability 1.4 Preview of Results 1.5 Organization of the Book 1.6 A Note on Figures References Chapter 2 Summary of Approaches and Needs 2.1 Why Models Are Important 2.2 Types of Nonlinear Models 2.3 Desirable Attributes 2.4 Behavioral or Black Box Characterization 2.5 Properties of Large-SignalModels in More Detail 2.5.1 List of Properties 2.5.2 The Subthreshold Region 2.5.3 Consequences of Fitting Well to Some Features of iD (vGS,vDS) butNot Others 2.5.4 Thermal Considerations 2.5.5 Construction of the Model from Measurements 2.5.6 The Position of Commercial Extractors 2.5.7 FET Size Considerations 2.5.8 Model Openness in Construction and Usability 2.5.9 Constraints Placed upon Models by Circuit Simulators 2.6 Rauscher and Willing 2.7 The Curtice Quadratic Model 2.7.1 Expression Used for the Modeling Current 2.7.2 Expression Used for the Modeling Capacitance 2.7.3 Basis 2.7.4 Underlying Soundness 2.7.5 Measurements Required 2.7.6 Openness of Procedure for Extracting the Model from Measurements 2.7.7 Scalability 2.7.8 General Comments 2.8 The Curtice-EttenbergModel 2.8.1 Expressions Used for Modeling Current 2.8.2 Expressions Used for Modeling Capacitance 2.8.3 Basis 2.8.4 Underlying Soundness 2.8.5 Measurements Required 2.8.6 Openness of Procedure for Extracting the Model from Measurements 2.8.7 Scalability 2.9 The Materka-KacprzakModel 2.9.1 Expressions Used for Modeling Current 2.9.2 Expressions Used for Modeling Capacitance 2.9.3 Basis 2.9.4 Underlying Soundness 2.9.5 Measurements Required 2.9.6 Openness of Procedure for Extracting the Model from Measurements 2.9.7 Scalability 2.10 An Illustrated Application 2.10.1 Current Equation: Modified Materka 2.10.2 Capacitance Equations: Use of the Statz Expressions 2.10.3 Results 2.11 The Statz Model 2.11.1 Expressions Used for Modeling Current 2.11.2 Expressions Used for Modeling Capacitance 2.11.3 Basis 2.11.4 Underlying Soundness 2.11.5 Measurements Required 2.11.6 Openness of Procedure for Extracting the Model from Measurements 2.11.7 Scalability 2.12 TriQuint Own Model (TOM) 2.12.1 Expressions Used for Modeling Current 2.12.2 Expressions Used for Modeling Capacitance 2.12.3 Basis 2.12.4 Underlying Soundness 2.12.5 Measurements Required 2.12.6 Openness of Procedure for Extracting the Model from Measurements 2.12.7 Scalability 2.13 The EEFET3 Model 2.13.1 Basis 2.13.2 Underlying Soundness 2.13.3 Openness of Procedure for Extracting the Model from Measurements 2.14 Other Models Using the Commonplace Equivalent Circuit 2.14.1 Dortu-MullerMethod 2.14.2 Rodrigues-Tellez 2.14.3 Tajima 2.14.4 University of Cantabria Model 2.14.5 University College Dublin Model 2.15 The Parker-SkellernModel 2.15.1 Shortcomings in Previous Practice 2.15.2 Parker’s Scheme: Nested Transformations 2.15.3 Expressions Used for Modeling Capacitance 2.15.4 Basis and Underlying Soundness 2.15.5 Measurements Required 2.15.6 Openness of Procedure for Extracting the Model from Measurements 2.15.7 Scalability 2.15.8 General Comments 2.16 The Root Model 2.16.1 Basis 2.16.2 Underlying Soundness 2.16.3 Measurements Required 2.16.4 Thermal Effects 2.16.5 Openness of Procedure for Extracting the Model from Measurements 2.16.6 General Comments 2.17 The Angelov Model 2.17.1 Expression Used for Modeling Current 2.17.2 Expression Used for Modeling Capacitance 2.17.3 Basis 2.17.4 Underlying Soundness 2.17.5 Measurements Required 2.17.6 Openness of Procedure for Extracting the Model from Measurements 2.17.7 Scalability 2.17.8 General Comments 2.18 Conclusion References Chapter 3 Practical Behavior of FETs 3.1 dc I(V), Dynamic I(V), and RF Properties 3.1.1 Example Differences Between dc I(V) and Dynamic i(v 3.1.2 Breakdown Different at RF from dc 3.1.3 Memory Effects: Surface States, Deep Levels, and Self-Heating 3.1.4 S-Parameters:dc Bias and Pulsed Bias 3.1.5 Device-to-DeviceVariations 3.2 Bias Dependence of the Elements 3.2.1 Common Practice: The Beginning with Rauscher and Willing 3.2.2 Fitting to S-Parameters:Examples 3.2.3 The Commonplace Model 3.2.4 Bias Dependence of the Elements: Examples 3.3 τ: A Vital But Overlooked Physical Variable References Chapter 4 The Standard Model:Deriving the Elements 4.1 Element Functions Obtained by Fitting: True or Askew? 4.2 Neglect of Nonlinear Terms 4.2.1 The Problem of Nonlinear Extraction 4.2.2 Extracted Versus True Nonlinear Element Functions 4.2.3 Consequences for Nonlinear Circuit Simulation 4.3 Difficult Cases: Early SiC FET Example 4.4 Improvements Towards a True Nonlinear Model References Chapter 5 The Capacitance Puzzlein the Standard Model 5.1 The Form of Cgd and Cds: Fact or Artefact? 5.2 The Composition of Cgc 5.3 C from g: Deriving Capacitance from Conductance 5.4 Standard Model Capacitance in Review References Chapter 6 Dynamic I(V) Measurements 6.1 Development of a Desktop Pulsed I(V) Instrument 6.2 Operation and Utilization 6.3 Memory and Other Effects 6.4 Contrariness as a Positive 6.5 Contemporary Instrumentation References Part II Chapter 7 Reformulating the Circuit Model 7.1 Introduction 7.2 The Core 7.3 Charge Flows When VGS Changes 7.4 Charge Flows When VDG Changes 7.5 Resistive and Ancillary Elements 7.6 Voltage Dependence of the Elements 7.7 Reduction in the Static State to the Standard Model 7.8 Previously Published Versions References Chapter 8 The Importance and Utility of τ 8.1 Nature and Origin 8.2 Pivotal Role in the Reformed Model 8.3 Inclusion in Circuit Simulators 8.4 X(τ) as a Staple of Device Operation 8.5 A Repository of Information on Device Technology References Chapter 9 Extraction 9.1 Introduction 9.2 Obtaining the Element Functions 9.2.1 Obtaining the Standard Model Element Functions: The Fitter 9.2.2 Fitting the New Topology Model 9.3 Curve Fitting Reference Chapter 10 Obtaining the Currentand Capacitance Functions 10.1 Current Functions from Pulsed I(V) Measurements 10.2 Dynamic I(V) Reconstructor 10.3 Implications for Slow-RateTransients 10.4 Obtaining the Capacitance Functions 10.5 Charge Conservation 10.6 The Defining Case of VDS = 0V 10.7 Practical Example of Reformed Model Elements References Chapter 11 Practical Results 11.1 Introduction 11.2 First Test: Power Compression and Harmonic Generation 11.3 A 38 GHz Frequency Doubler 11.4 Two-Stageand Three-Stage500 mWMMIC 11.5 Harmonic Load Pull 11.6 Memory Effect: Basic Illustration References Chapter 12 Circuit Simulators 12.1 Introduction 12.2 Implementation in a Harmonic Balance Simulator 12.2.1 Particularizing the Model 12.2.2 Accommodating τ 12.2.3 Run Time and Convergence 12.3 Experience with a Time-DomainSimulator 12.4 Simulation Prospects References Part III Chapter 13 Fundamentals of FET Operation 13.1 Introduction 13.2 Electron Depletion and Transport 13.3 The Space-ChargeLayer Extension X 13.4 The Flat d Approximation 13.5 The Uniform EyX Termination Approximation 13.6 Expressions for VGC and VD′G 13.7 The d-LiftPrinciple 13.8 The Delay τgm References Chapter 14 Current and Charge Conservation 14.1 Channel Current 14.2 Transreactance Current 14.3 Charge Conservation 14.4 Charge Storage by Pure Delay τ 14.5 Resistances RS and RI References Chapter 15 Charge Storage 15.1 Revisiting Capacitance 15.2 When VGS Changes 15.2.1 The Overall Picture 15.2.2 Branch Capacitance 15.2.3 Transcapacitance 15.2.4 Branch Charge Storage by Pure Delay 15.3 When VDS Changes 15.3.1 The Overall Picture 15.3.2 Branch Capacitance 15.3.3 Transcapacitance 15.3.4 Orthogonal Branch Charge Storage by Pure Delay 15.4 One Last Visit 15.4.1 Reconciliation of the Main Capacitances 15.4.2 Wherefore Cds? 15.4.3 The True Nature of the Standard Model 15.5 Enter the Transit Time References Chapter 16 Macro-CellSimulators 16.1 Introduction 16.2 Simulator Requirements 16.3 Macro-CellSolvers 16.3.1 The Macro-CellIdea 16.3.2 Construction 16.3.3 Choosing the Cells 16.3.4 Below-the-KneeRealism 16.3.5 Deconfinement of Hot Electrons 16.4 The PHEMT Macro-CellSolver 16.5 Applications and Limitations References Conclusion Acronyms and Abbreviations List of Symbols About the Author Index