MOS Interface Physics, Process and Characterization

The electronic device based on Metal Oxide Semiconductor (MOS) structure is the most important component of a large-scale integrated circuit, and is therefore a fundamental building block of the information society. Indeed, high quality MOS structure is the key to achieving high performance devices and integrated circuits. Meanwhile, the control of interface physics, process and characterization methods determine the quality of MOS structure. This book tries to answer five key questions: Why are high-performance integrated circuits bonded together so closely with MOS structure? Which physical phenomena occur in MOS structure? How do these phenomena affect the performance of MOS structure? How can we observe and quantify these phenomena scientifically? How to control the above phenomena through process? Principles are explained based on common experimental phenomena, from sensibility to rationality, via abundant experimental examples focusing on MOS structure, including specific experimental steps with a strong level of operability. This book will be an essential reference for engineers in semiconductor related fields and academics and postgraduates within the field of microelectronics. The electronic device based on Metal Oxide Semiconductor (MOS) structure is the most important component of a large-scale integrated circuit and the key to achieving high performance devices. This book contains experimental examples focusing on MOS and will be a reference for academics and postgraduates in the field of microelectronics. Cover 1 Half Title 2 Title Page 4 Copyright Page 5 Table of Contents 6 Preface 10 Authors 12 INTRODUCTION 14 0.1 SCOPE AND PLAN OF THE BOOK 14 0.2 BRIEF HISTORY OF MOS DEVICES 15 BIBLIOGRAPHY 18 Chapter 1 Physics of Interface 20 1.1 MOS INTERFACE 20 1.2 THE PHYSICAL NATURE OF INTERFACE STATES AND BULK DEFECTS 21 1.3 MOS INTERFACE PASSIVATION METHODS 22 1.4 INTERFACE THERMODYNAMICS 24 1.5 QUANTUM CONFINEMENT EFFECT IN MOS 26 1.6 INTERFACIAL DIPOLE IN MOS GATE STACKS 27 1.7 EXTRACTION METHOD OF DIPOLE FORMATION AT HIGH-K/SIO[sub(2)] INTERFACE 30 1.7.1 Capacitance–Voltage Method 30 1.7.2 Method Based on X-ray Photoemission Spectroscopy 34 1.7.3 Method Based on Internal Photoemission 36 1.8 PHYSICAL ORIGIN OF DIPOLE FORMATION AT HIGH-K/SIO[sub(2)] INTERFACE 37 1.8.1 Electronegativity Model 37 1.8.2 Areal Oxygen Density Model 39 1.8.3 Interface Induced Gap States Model 40 1.9 “ROLL-OFF” AND “ROLL-UP” PHENOMENON 46 1.10 PHYSICAL ORIGIN OF FIXED CHARGES AT GE/GEO[sub(X)] INTERFACE 53 1.11 SUMMARY 60 BIBLIOGRAPHY 60 Chapter 2 MOS Processes 64 2.1 MOS CAPACITOR PREPARATION PROCESS 64 2.1.1 Slicing 65 2.1.2 Cleaning 65 2.1.3 Dielectric Formation 67 2.1.4 Metal Evaporation to Form Electrodes 69 2.2 OXIDATION PROCESS AND KINETICS 71 2.2.1 Thermal Processing (RTP) and Plasma Oxidation Systems 71 2.2.1.1 Thermal Processing (RTP) Systems 71 2.2.1.2 Plasma Oxidation Systems 75 2.2.2 Summary of Oxidation 89 2.3 DEPOSITION PROCESS 89 2.3.1 Sputtering 89 2.3.2 Atomic Layer Deposition 93 2.3.3 Vacuum Thermal Evaporation 96 2.3.4 Molecular Beam Epitaxy (MBE) 98 2.3.5 Metal Organic Chemical Vapor Deposition (MOCVD) 101 2.4 SUMMARY 106 BIBLIOGRAPHY 106 Chapter 3 MOS Characterizations 108 3.1 METHODS FOR EVALUATING THE DENSITY OF INTERFACE STATES OF MOS 108 3.1.1 High-Frequency (Terman) Method 108 3.1.2 Quasi-Static (Low-Frequency) Method 110 3.1.3 High–Low-Frequency Method 112 3.1.4 C–φ[sub(s)] Method 112 3.1.5 Conductance Method 115 3.2 EXPERIMENTAL STEP 118 3.2.1 Calibrate the Equipment 119 3.2.1.1 Phase Calibration 120 3.2.1.2 Butt Joint of Coaxial Joint and Triaxial Joint 123 3.2.1.3 Open-Circuit Calibration 125 3.2.1.4 Short-Circuit Calibration 126 3.2.2 C–V Curve Was Measured After Calibration 126 3.2.3 An Example of Measuring Density of Interface States of SiC MOS by Conductance Method 128 3.2.3.1 Part 1: Measurement of the C–V Curve 128 3.2.3.2 Part 2: Measurement of the G–f Curve 129 3.2.3.3 Part 3: Measurement of the System Series Resistance R[sub(s)] 130 3.3 HYSTERESIS AND BULK CHARGE 136 3.3.1 Interface Trapped Charge 137 3.3.2 Near Interface Trapped Charge (Border Trap) 138 3.3.3 Fixed Charge in the Oxide Layer 143 3.4 EQUIVALENT OXIDE THICKNESS 143 3.5 LEAKAGE 146 3.5.1 Direct Tunneling 147 3.5.2 Poole–Frenkel Leakage 151 3.5.3 Fowler–Nordheim Tunneling 155 3.5.4 Other Transport Mechanisms of Carriers 156 3.6 WORK FUNCTION AND EFFECTIVE WORK FUNCTION 159 3.6.1 Definition of EWF Based on Terraced SiO[sub(2)] 161 3.6.2 Definition of EWF Based on Terraced High-k Dielectric 162 3.6.3 Quantitative Analysis of the Effects of Various Factors on EWF 163 BIBLIOGRAPHY 166 APPENDIX I: PHYSICAL CONSTANTS 168 APPENDICES II–V: USEFUL DATA FOR MOS INTERFACE IN PERIODIC TABLE 170 Metal,Oxide,Semiconductor;,Microelectronics;,Semiconductor;,Magnetism Metal Oxide Semiconductor,Microelectronics,Semiconductor,Magnetism "The electronic device based on Metal Oxide Semiconductor (MOS) structure is the most important component of a large-scale integrated circuit and the key to achieving high performance devices and integrated circuits is high quality MOS structure. This book contains abundant experimental examples focusing on MOS structure. The volume will be an essential reference for academics and postgraduates within the field of microelectronics"-- Provided by publisher