High Quality Test Pattern Generation and Boolean Satisfiability

This book provides an overview of automatic test pattern generation (ATPG) and introduces novel techniques to complement classical ATPG, based on Boolean Satisfiability (SAT). A fast and highly fault efficient SAT-based ATPG framework is presented which is also able to generate high-quality delay tests such as robust path delay tests, as well as tests with long propagation paths to detect small delay defects. The aim of the techniques and methodologies presented in this book is to improve SAT-based ATPG, in order to make it applicable in industrial practice. Readers will learn to improve the performance and robustness of the overall test generation process, so that the ATPG algorithm reliably will generate test patterns for most targeted faults in acceptable run time to meet the high fault coverage demands of industry. The techniques and improvements presented in this book provide the following advantages: * Provides a comprehensive introduction to test generation and Boolean Satisfiability (SAT); * Describes a highly fault efficient SAT-based ATPG framework; * Introduces circuit-oriented SAT solving techniques, which make use of structural information and are able to accelerate the search process significantly; * Provides SAT formulations for the prevalent delay faults models, in addition to the classical stuck-at fault model; * Includes an industrial perspective on the state-of-the-art in the testing, along with SAT; two topics typically distinguished from each other. Annotation This book provides an overview of automatic test pattern generation (ATPG) and introduces novel techniques to complement classical ATPG, based on Boolean Satisfiability (SAT). A fast and highly fault efficient SAT-based ATPG framework is presented which is also able to generate high-quality delay tests such as robust path delay tests, as well as tests with long propagation paths to detect small delay defects. The aim of the techniques and methodologies presented in this book is to improve SAT-based ATPG, in order to make it applicable in industrial practice. Readers will learn to improve the performance and robustness of the overall test generation process, so that the ATPG algorithm reliably will generate test patterns for most targeted faults in acceptable run time to meet the high fault coverage demands of industry. The techniques and improvements presented in this book provide the following advantages:Provides a comprehensive introduction to test generation and Boolean Satisfiability (SAT);Describes a highly fault efficient SAT-based ATPG framework; Introduces circuit-oriented SAT solving techniques, which make use of structural information and are able to accelerate the search process significantly;Provides SAT formulations for the prevalent delay faults models, in addition to the classical stuck-at fault model;Includes an industrial perspective on the state-of-the-art in the testing, along with SAT; two topics typically distinguished from each other Front Matter....Pages i-xviii Introduction....Pages 1-8 Front Matter....Pages 9-9 Circuits and Testing....Pages 11-40 Boolean Satisfiability....Pages 41-57 ATPG Based on Boolean Satisfiability....Pages 59-70 Front Matter....Pages 71-71 Dynamic Clause Activation....Pages 73-106 Circuit-Based Dynamic Learning....Pages 107-124 Front Matter....Pages 125-125 High Quality ATPG for Transition Faults....Pages 127-154 Path Delay Fault Model....Pages 155-180 Summary and Outlook....Pages 181-182 Back Matter....Pages 183-193