Fabless Semiconductor Implementation

Discover How to Launch and Succeed as a Fabless Semiconductor Firm Fabless Semiconductor Implementation takes you step-by-step through the challenges faced by fabless firms in the development of integrated circuits. This expert guide examines the potential pitfalls of IC implementation in the rapidly growing fabless segment of the semiconductor industry and elaborates how to overcome these difficulties. It provides a comprehensive overview of the issues that executives and technical professionals encounter at fabless companies. Filled with over 150 on-target illustrations, this business-building tool presents a clear picture of the entire lifecycle of a fabless enterprise, describing how to envision and execute fabless IC implementation. Inside This Comprehensive Guide to Fabless IC Design - Define and specify the product Understand the customer requirements, the value chain, and the supply chain Select the right implementation approach, including “make” vs. “buy” Choose the best technologies and supply chain Implement IC design, fabrication, and manufacturing Build the operations infrastructure to meet cost and quality requirements Program-manage the distributed supply chain Contents......Page 9 Preface......Page 13 Why This Book?......Page 17 Acknowledgments......Page 19 1.1 Semiconductor Industry......Page 23 1.2 Fabless Industry......Page 40 1.3 Key Points......Page 52 2.1 Electronics Markets......Page 53 2.2 The Global Opportunity......Page 57 2.3 Some Challenges in Today’s Electronics Marketplace......Page 58 2.4 Understanding the Value Chain......Page 59 2.5 Customer Needs......Page 61 2.6 Overview of Fabless Company Development Activities......Page 62 2.7 Key Points......Page 68 3.1 Getting Started......Page 69 3.3 Funding Process......Page 76 3.4 Development Cycle—the Four Phases......Page 80 3.5 Roadmap of Products......Page 84 3.7 Long Range Strategies......Page 87 3.8 Key Points......Page 88 4.1 FPGA, Gate Array ASICs, Semi-custom ASICs......Page 89 4.2 If You Had a Fab (IDM)......Page 95 4.3 Fabless Sourcing Models (ASSP, COT, ASIC)......Page 98 4.4 Design Strategies......Page 108 4.5 Key Points......Page 120 5.1 Introduction......Page 121 5.2 Considerations to Pick the Right Technology......Page 123 5.3 Cost per Function (CPF)......Page 124 5.4 CPF Reduction from Technology Scaling......Page 126 5.5 Die Cost Reduction by Increasing Wafer Size......Page 131 5.6 Foundry Financials and Technologies......Page 135 5.7 Process Technologies......Page 137 5.8 CMOS Challenges......Page 149 5.9 The Design Ecosystem......Page 153 5.10 Process Alternatives......Page 171 5.11 Nanotechnology Co-design Solutions......Page 173 5.12 Packaging Considerations......Page 179 5.13 Key Points......Page 196 6.1 Introduction......Page 197 6.2 Design Flow and Supply Chain......Page 198 6.3 Implementation Time Line......Page 207 6.4 Silicon Prototyping and Production......Page 208 6.5 Packaging Considerations......Page 216 6.6 Test Considerations......Page 218 6.7 Quality and Reliability Considerations......Page 219 6.8 Supply Chain Considerations......Page 220 6.9 Operations Best Practices......Page 227 6.10 Operations Effort and Resources......Page 228 6.11 Resource Skill Sets......Page 229 6.12 Production Operations Activities and Processes......Page 232 6.13 Key Points......Page 238 7.1 Unit Cost Estimation......Page 239 7.2 Optimizing the Die Size and Packing Density per Chip......Page 251 7.3 Development Cost......Page 254 7.4 Development and Operations Costs......Page 265 7.6 Some Cost Tradeoffs......Page 268 7.7 Key Points......Page 269 8 Managing Quality......Page 271 8.1 Quality Manual......Page 274 8.2 Documentation System......Page 276 8.3 Quality in the Development Phase......Page 277 8.4 IC Quality and Reliability Qualification......Page 278 8.5 Manufacturing Quality......Page 288 8.6 Customer Support......Page 289 8.7 Key Points......Page 290 9.1 Management at the Vertically Integrated Company......Page 291 9.2 Management of the Distributed Supply Chain......Page 292 9.3 Comparison of Management Processes......Page 296 9.5 Program Management......Page 297 9.6 Risk Management......Page 299 9.7 Design Productivity......Page 300 9.8 Key Points......Page 302 10.1 Industry Stratification and Opportunities......Page 303 10.2 Funding......Page 305 10.3 Alternatives to the IDM Model......Page 306 10.4 Virtual “Re-Integration”/IFM......Page 309 10.6 Managing Innovation......Page 314 10.7 The Role of Research Organizations......Page 315 10.8 Key Points......Page 319 A.1 Business Plan Example......Page 321 A.2 Term Sheet Outline......Page 322 B.1 Transistor Scaling......Page 323 B.2 Yield Models......Page 325 B.3 Quality......Page 327 C......Page 329 E......Page 330 H......Page 331 M......Page 332 N......Page 333 R......Page 334 S......Page 335 V......Page 336 Y......Page 337 Acronyms......Page 339 Bibliography......Page 343 Index......Page 351 C......Page 353 F......Page 354 M......Page 355 P......Page 356 S......Page 357 Y......Page 358 Contents 9 Preface 13 Why This Book? 17 Acknowledgments 19 1 Industry Perspectives 23 1.1 Semiconductor Industry 23 1.2 Fabless Industry 40 1.3 Key Points 52 2 The Big Picture 53 2.1 Electronics Markets 53 2.2 The Global Opportunity 57 2.3 Some Challenges in Today’s Electronics Marketplace 58 2.4 Understanding the Value Chain 59 2.5 Customer Needs 61 2.6 Overview of Fabless Company Development Activities 62 2.7 Key Points 68 3 Lifecycle of a Fabless IC Company 69 3.1 Getting Started 69 3.2 Business Plan 76 3.3 Funding Process 76 3.4 Development Cycle—the Four Phases 80 3.5 Roadmap of Products 84 3.6 Exit Strategies 87 3.7 Long Range Strategies 87 3.8 Key Points 88 4 Selecting the Implementation Approach 89 4.1 FPGA, Gate Array ASICs, Semi-custom ASICs 89 4.2 If You Had a Fab (IDM) 95 4.3 Fabless Sourcing Models (ASSP, COT, ASIC) 98 4.4 Design Strategies 108 4.5 Key Points 120 5 Selecting the Technologies 121 5.1 Introduction 121 5.2 Considerations to Pick the Right Technology 123 5.3 Cost per Function (CPF) 124 5.4 CPF Reduction from Technology Scaling 126 5.5 Die Cost Reduction by Increasing Wafer Size 131 5.6 Foundry Financials and Technologies 135 5.7 Process Technologies 137 5.8 CMOS Challenges 149 5.9 The Design Ecosystem 153 5.10 Process Alternatives 171 5.11 Nanotechnology Co-design Solutions 173 5.12 Packaging Considerations 179 5.13 Key Points 196 6 Implementing the COT Approach 197 6.1 Introduction 197 6.2 Design Flow and Supply Chain 198 6.3 Implementation Time Line 207 6.4 Silicon Prototyping and Production 208 6.5 Packaging Considerations 216 6.6 Test Considerations 218 6.7 Quality and Reliability Considerations 219 6.8 Supply Chain Considerations 220 6.9 Operations Best Practices 227 6.10 Operations Effort and Resources 228 6.11 Resource Skill Sets 229 6.12 Production Operations Activities and Processes 232 6.13 Key Points 238 7 Managing Cost 239 7.1 Unit Cost Estimation 239 7.2 Optimizing the Die Size and Packing Density per Chip 251 7.3 Development Cost 254 7.4 Development and Operations Costs 265 7.5 Overall Development Cost Estimation 268 7.6 Some Cost Tradeoffs 268 7.7 Key Points 269 8 Managing Quality 271 8.1 Quality Manual 274 8.2 Documentation System 276 8.3 Quality in the Development Phase 277 8.4 IC Quality and Reliability Qualification 278 8.5 Manufacturing Quality 288 8.6 Customer Support 289 8.7 Key Points 290 9 Managing the Implementation Program 291 9.1 Management at the Vertically Integrated Company 291 9.2 Management of the Distributed Supply Chain 292 9.3 Comparison of Management Processes 296 9.4 Relationship and Partnership Management 297 9.5 Program Management 297 9.6 Risk Management 299 9.7 Design Productivity 300 9.8 Key Points 302 10 Future Trends 303 10.1 Industry Stratification and Opportunities 303 10.2 Funding 305 10.3 Alternatives to the IDM Model 306 10.4 Virtual “Re-Integration”/IFM 309 10.5 Order Entry Methodology 314 10.6 Managing Innovation 314 10.7 The Role of Research Organizations 315 10.8 Key Points 319 Appendices 321 A.1 Business Plan Example 321 A.2 Term Sheet Outline 322 B.1 Transistor Scaling 323 B.2 Yield Models 325 B.3 Quality 327 Glossary 329 A 329 B 329 C 329 D 330 E 330 F 331 G 331 H 331 I 332 J 332 L 332 M 332 N 333 O 334 P 334 Q 334 R 334 S 335 T 336 V 336 W 337 Y 337 Acronyms 339 Bibliography 343 Index 351 A 353 B 353 C 353 D 354 E 354 F 354 G 355 H 355 I 355 J 355 K 355 L 355 M 355 N 356 O 356 P 356 Q 357 R 357 S 357 T 358 U 358 V 358 W 358 X 358 Y 358

discover How To Launch And Succeed As A Fabless Semiconductor Firm

fabless Semiconductor Implementation Takes You Step-by-step Through The Challenges Faced By Fabless Firms In The Development Of Integrated Circuits. This Expert Guide Examines The Potential Pitfalls Of Ic Implementation In The Rapidly Growing Fabless Segment Of The Semiconductor Industry And Elaborates How To Overcome These Difficulties. It Provides A Comprehensive Overview Of The Issues That Executives And Technical Professionals Encounter At Fabless Companies.

filled With Over 150 On-target Illustrations, This Business-building Tool Presents A Clear Picture Of The Entire Lifecycle Of A Fabless Enterprise, Describing How To Envision And Execute Fabless Ic Implementation.

inside This Comprehensive Guide To Fabless Ic Design

-
• Define And Specify The Product
• Understand The Customer Requirements, The Value Chain, And The Supply Chain
• Select The Right Implementation Approach, Including “make” Vs. “buy”
• Choose The Best Technologies And Supply Chain
• Implement Ic Design, Fabrication, And Manufacturing
• Build The Operations Infrastructure To Meet Cost And Quality Requirements
• Program-manage The Distributed Supply Chain

Publisher's Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product. Discover How to Launch and Succeed as a Fabless Semiconductor Firm Fabless Semiconductor Implementation takes you step-by-step through the challenges faced by fabless firms in the development of integrated circuits. This expert guide examines the potential pitfalls of IC implementation in the rapidly growing fabless segment of the semiconductor industry and elaborates how to overcome these difficulties. It provides a comprehensive overview of the issues that executives and technical professionals encounter at fabless companies. Filled with over 150 on-target illustrations, this business-building tool presents a clear picture of the entire lifecycle of a fabless enterprise, describing how to envision and execute fabless IC implementation. Inside This Comprehensive Guide to Fabless IC Design - "Fabless Semiconductor Implementation takes you step-by-step through the challenges faced by fabless firms in the development of integrated circuits. This expert guide examines the potential pitfalls of IC implementation in the fabless segment of the semiconductor industry and explains how to overcome these difficulties. It provides a comprehensive overview of the issues that executives and technical professionals encounter at fabless companies." "Filled with over 150 illustrations, this business-building tool presents a clear picture of the entire lifecycle of a fabless enterprise, describing how to envision and execute fabless IC implementation."--book jacket Tackles the challenges faced by integrated circuit manufacturing firms following or transitioning over to the fables business model (focusing on design and outsourcing the actual manufacturing). This resource details the potential pitfalls and solutions for the IC design model