Evolvable Systems: From Biology to Hardware: 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings (Lecture Notes in Computer Science, 4684)

This book constitutes the refereed proceedings of the 7th International Conference on Evolvable Systems, ICES 2007, held in Wuhan, China, in September 2007. The 41 revised full papers collected in this volume are organized in topical sections on digital hardware evolution, analog hardware evolution, bio-inspired systems, mechanical hardware evolution, evolutionary design, evolutionary algorithms in hardware design, and hardware implementation of evolutionary algorithms. Title Page Preface Organization Table of Contents An Online EHW Pattern Recognition System Applied to Sonar Spectrum Classification Introduction The Online EHW Architecture System Overview Classification Module Overview Category Detection Module Functional Unit Implementation Sonar Return Classification Functional Unit Implementation Evolution Genome Incremental Evolution of the Category Detectors Fitness Function Results Architecture and Evolution Parameters Classification Accuracy Evolution Speed Hardware Implementation Discussion Conclusions References Design of Electronic Circuits Using a Divide-and-Conquer Approach Introduction Design Logic Circuits with a Two-Layer Encoding Method Circuit Encoding Scheme Evolving Scheme Evolutionary Operations Simulation and Evaluation Simulation Algorithm of Electronic Logic Circuits Evaluation of Electronic Logic Circuits Experiment Conclusion References Implementing Multi-VRC Cores to Evolve Combinational Logic Circuits in Parallel Introduction Previous Scalable Approaches to EHW Description of the Proposed Approach Decomposition of Logic Circuit Evolutionary Algorithm Hardware Implementation Experimental Results Discussion Conclusion References An Intrinsic Evolvable Hardware Based on Multiplexer Module Array Introduction The Structure of MMA Function Styles Multiplexer Module Multiplexer Module Array The Proposed System The Experiment Platform VHDL design Encoding and Decoding Fitness Evaluation Experiment Results Conclusion References Estimating Array Connectivity and Applying Multi-output Node Structure in Evolutionary Design of Digital Circuits Introduction Estimating Array Connectivity Representation of Multi-output Node Structure Multi-objective Fitness Function Evolutionary Algorithm Experimental Results and Analysis 1-Bit Full Adder 2-Bit Adder 2-Bit Multiplier 4-Bit Adder Conclusion References Research on the Online Evaluation Approach for the Digital Evolvable Hardware Introduction The Incremental Evaluation Approach The Technical Scheme The Online EHW Evolutionary Platform Coding Immune Genetic Algorithm Results and Discussion Online Evolutionary Design Results of the Combinational Logic Circuits Online Evolutionary Design Results of the Sequential Logic Circuits Conclusion References Research on Multi-objective On-Line Evolution Technology of Digital Circuit Based on FPGA Model Introduction Multi-objective Design Principle of Digital Circuit On-Line Evolution Multi-objective Optimization Model and Evolutionary Algorithm Encoding and Searching Methods of Digital Circuit Improved Multi-objective Evolutionary Strategy of Digital Circuit Design Experimental Results Experimental Program and Results Analysis Circuit Structures Analysis Conclusions References Evolutionary Design of Generic Combinational Multipliers Using Development Introduction Biologically Inspired Development Development of Efficient Generic Multipliers Instruction-Based Developmental System Evolutionary System Setup Experimental Results and Discussion Conclusions References Automatic Synthesis of Practical Passive Filters Using Clonal Selection Principle-Based Gene Expression Programming Introduction Related Work and Motivations An Overview of Gene Expression Programming Circuit Representation and Analysis Motivation from Binary Tree Representation and GEP Synthesize RLC Filters Using CS-GEP Circuit Encoding Method The Framework of CS-GEP Experiment Result Experiment A: Low-Pass Filter Synthesis Experiment B: High-Pass Filter Synthesis Conclusion References Research on Fault-Tolerance of Analog Circuits Based on Evolvable Hardware Introduction Architecture of FPACA Evolutionary Design of FPACA HereBoy: A Fast Evolutionary Algorithm Coding of the FPACA Fitness Function Fault-Tolerance Experiments of FPACA Analog Circuits Single-Transistor Fault Multi-transistor Faults Analysis of Results Conclusions References Analog Circuit Evolution Based on FPTA-2 Introduction FPTA-2 Hereboy Algorithm and Fitness Function Hereboy Algorithm Fitness Adjustment Experiments Evolution of Feedback Amplifier Fitness Adjustment Parallel Cell Structure Conclusion References Knowledge Network Management System with Medicine Self Repairing Strategy Introduction Intelligent Knowledge Network Management System Knowledge Network Management Strategy Medicine Self Repairing Strategy Self Maintenance Self Internal Entropy and SEG Balancing Factor Medicine Self Repairing Mechanism Experiments Conclusion References Design of a Cell in Embryonic Systems with Improved Efficiency and Fault-Tolerance Introduction Architecture of Cells in Embryonic Systems Co-ordinate Generator and Memory Function Unit Switch Box Control Unit Fault Tolerance Mechanism of Embryonic Systems Fault Detection and Fault Tolerance at Cell-Level Fault Tolerance at Array-Level Example Simulation and Results Verification of Cell-Level Fault Tolerance Verification of Array-Level Fault Tolerance Conclusions and Future Work References Design on Operator-Based Reconfigurable Hardware Architecture and Cell Circuit Introduction Reconfigurable Hardware Architecture The General Architecture Design of Operator-Based Programmable Cell PMAC Design of Programmable Interconnection Network Analysis of Experiment Results Hardware Resource Consumption of PMAC Performance Analysis of PMAC Conclusion References Bio-inspired Systems with Self-developing Mechanisms Introduction Self-developing Mechanisms Structural Configuration Functional Configuration Cloning Cicatrization Regeneration SOS Acronym Application Structural Configuration, Functional Configuration and Cloning Cicatrization and Functional Reconfiguration Regeneration Basic Processes Hardware Implementation CONFETTI Platform SOS Application Conclusion References Development of a Tiny Computer-Assisted Wireless EEG Biofeedback System Introduction Design of the System The Structure of wEEG VR Program and EEG Biofeedback Training Protocol Implementation and Experiment Results Conclusions and Future Work References Steps Forward to Evolve Bio-inspired Embryonic Cell-Based Electronic Systems Introduction Evolvable Hardware Definition Reconfigurable Hardware Evolutionary Algorithms EHW Classification Evolvable Embryonics Motivations The Genetic Algorithm The Experiment Conclusion and Further Work References Evolution of Polymorphic Self-checking Circuits Introduction Self-checking Circuits Polymorphic Circuits ProposedMethod Polymorphic Self-checking Analysis of Self-checking Capabilities Test Problem: Full Adder Evolutionary Design of Polymorphic Circuits Results Full Adders Half Adder (HA) Extended Adder (ANDFA1) Discussion Conclusions References Sliding Algorithm for Reconfigurable Arrays of Processors Introduction Background Discrete Morse Function Sliding Tree Algorithm Distance Function Discrete Vector Fields Path Searching Algorithm Results Conclusion References System-Level Modeling and Multi-objective Evolutionary Design of Pipelined FFT Processors for Wireless OFDM Receivers Introduction Related Work Pipelined FFT Processors and Wordlength Optimizations Statement of the Multi-objective Optimization Problem System-Level Modeling of Pipelined FFT Processors Multi-objective Evolutionary Design Simulation Results References Reducing the Area on a Chip Using a Bank of Evolved Filters Introduction Conventional Image Filters Evolutionary Design of Image Filters The Approach EA for Filter Evolution Fitness Function Design Examples Proposed Approach Experimental Results Quality of Filtering Implementation Cost Other Properties of Evolved Bank Filters Discussion References Walsh Function Systems:The Bisectional Evolutional Generation Pattern Introduction The Bisectional Evolution Pattern BEGP for Walsh Function Systems The Matrix Presentation for Walsh Function Systems BEGP for Walsh Function System of Walsh Ordering BEGPs and Orderings for Walsh Function Systems Ways of Ordering for Walsh Function Systems Walsh Function System of Quasi-hadamard Ordering Conclusions References Extrinsic Evolvable Hardware on the RISA Architecture Introduction RISA The RISA FPGA Fabric Fabric Configuration SNAP, the RISA Microcontroller The RISA Device Evolvable Hardware Using the RISA Platform Future Development for the RISA Architecture Conclusions References Evolving and Analysing “Useful” Redundant Logic Introduction Background Fault Models and Simulated Faults Redundancy Measuring Functionality and Reliability Previous Work Experiments Algorithm for Classifying Redundant Gates $R_{trad\_single}$ Based on Measured Redundancy Experimental Setup Results and Discussion Simple Functionality Complex Functionality No Specified Functionality Conclusion and FurtherWork References Adaptive Transmission Technique in Underwater Acoustic Wireless Communication Introduction Theoretical Derivation of Channel Capacity Theoretical Experiment of UACh Capacity Theoretical Experiment of UACh Capacity at Low Frequency Theoretical Experiment of UACh Capacity at High Frequency Summary of Section 3 Variability of UACh Capacity in the Sloping Condition UACh Capacity in the Sloping Condition at Low Frequency UACh Capacity in the Sloping Condition at High Frequency Summary of Section 4 Summary Referrences Autonomous Robot Path Planning Based on Swarm Intelligence and Stream Functions Introduction Obstacles Avoidance in Potential Flows Path Planning Based on Swarm Intelligence and Stream Functions Particle Swarm Optimization (PSO) Model Based on PSO and Stream functions Simulation Results Conclusions and Future Work References Research on Adaptive System of the BTT-45 Air-to-Air Missile Based on Multilevel Hierarchical Intelligent Controller Introduction The Design Ideas Intelligence Control's Application to the BTT-45 Air-to-Air Missile The Design of the BTT-45 Air-to-Air Missile's Organization Level The Design of the BTT-45 Air-to-Air Missile's Coordination Level The Design of the BTT-45 Air-to-Air Missile's Executive Level The Implement and Experiment of Control System Conclusion References The Design of an Evolvable On-Board Computer Introduction Intelligent Systems for Deep Space Applications EHW in On-Board Computers Example Conclusions References Extending Artificial Development: Exploiting Environmental Information for the Achievement of Phenotypic Plasticity Introduction Environmental Information Development Model Experiments Experimental Setup Environmental Influence Exploited to Retain Functionality Environmental Influence Exploited to Adapt Functionality Conclusions and Further Work References UDT-Based Multi-objective Evolutionary Design ofPassive Power Filters of a Hybrid Power Filter System* Introduction Background and Problem Statement The UDT-Based Multi-objective Adaptive GA Sequence-Number-Based Encoding UDT-Based Integration of Multi-objectives Pspice-Based Multi-objective Evaluation of PPF Candidates UDT Based Multi-parent Crossover Adaptation Strategy for GA Parameters Summary of the Algorithm Experiments and Discussions Conclusions References Designing Electronic Circuits by Means of GeneExpression Programming II Introduction Gene Expression Programming Gene Representation Genetic Operator Circuits Evolution Use Gene Expression Programming Chromosome Representation Genetic Operation Algorithm Framework Case Study Case 1: One-Bit Full Adder Case 2: Two-Bit Half Adder Case 3: Two-Bit Full Adder Conclusion References Designing Polymorphic Circuits with Evolutionary Algorithm Based on Weighted Sum Method Introduction Background Evolutionary Design with Weighted Sum Method Brief Introduction to CGP Weighted Sum Method Experiments Discussions References Robust and Efficient Multi-objective Automatic Adjustment for Optical Axes in Laser Systems Using Stochastic Binary Search Algorithm Introduction Multi-objective Automatic Adjustment of Optical Axes Automatic Adjustment System Noise Sources in the Adjustment System Proposed Adjustment Method Stochastic Binary Search Algorithm Weighted Averaged Fitness Adjustment Experiments Experimental Details Experimental Results References Minimization of the Redundant Sensor Nodes in Dense Wireless Sensor Networks Introduction The Basic Hypothesis and Problem Definition Basic Hypothesis and Problem Definition Multi-objective Integer Programming Formulation Multi-objective Optimization Using Genetic Algorithms Individual Representation and Population Sorting Selection, Crossover and Mutation Central Algorithm Based on GA A Local Solution Detailed Description of ELCNBMRE Local Algorithm Based on ELCNBMRE Algorithm Implementations and Experiments Conclusion References Evolving in Extended Hamming Distance Space:Hierarchical Mutation Strategy and Local Learning Principle for EHW Introduction Extended Hamming Distance Space Extended Hamming Distance Construct Search Space as Extended Hamming Distance Space Hierarchical Mutation and Local Learning Hierarchical Mutation Local Learning Principle Experimental Settings and Results Analysis Experimental Settings Experimental Results Conclusion References Adaptive and Evolvable Analog Electronics for Space Applications Introduction Reconfigurable Analog Array Analog Circuits for Sensing and Actuation in Space Avionics SRAA Architecture Analog Array Reconfiguring Circuit Topologies by Signal Switch Box (On-Chip Controls) Tuning Cells by Programmable Controls Digital Programmable Controls for Function Select and SRAA Operation Mapping a Variety of Circuits by Selective Interconnect of SRAA Cells Mapping Circuits into SRAA Functional Simulations Digital Controls: FPGA and ASIC Implementations FPGA Functions Digital ASIC Implementing a Genetic Processor Adaptation and Evolution Under Digital Controls Conclusions References Improving Flexibility in On-Line Evolvable Systems by Reconfigurable Computing Introduction Reconfigurable Computing Approaches to Reconfigurable Computing with FPGAs A Flexible Classifier Architecture The Original Classification Module A Flexible Classification Module Conclusions References Evolutionary Design of Resilient Substitution Boxes: From Coding to Hardware Implementation Introduction Preliminaries for Substitution Boxes Evolutionary Algorithms: Nash Startegy and Evolvable Hardware Nash Equilibrium-Based Evolutionary Algorithm Evolvable Hardware Crossover Operators for S-Box Codings and HardwareImplementations Evolutionary Coding of Resilient S-Boxes Fitness of S-Box Coding Evolvable Hardware Implementation of S-Boxes Fitness of an S-Box Circuit PerformanceResults Performance of S-Box Evolutionary Coding Performance of S-Box Evolvable Hardware Conclusion References A Sophisticated Architecture for EvolutionaryMultiobjective Optimization Utilizing HighPerformance DSP* Introduction Background Brief Description of the NSGA-II The Chip Used in This Design Evolutionary Multi-objective Optimization on DSP Description Language Chromosome Representation Design Architecture Algorithm Modules Experimental Results Test Problem Experimental Environment Experimental Results Performance Comparison Conclusions References FPGA-Based Genetic Algorithm Kernel Design Introduction System Overview System Design Functional Components Memory Components Synthesis for FPGA Conclusion and Future Works References Using Systolic Technique to Accelerate an EHW Engine for Lossless Image Compression Introduction Extended BinEP and Fitness Evaluation Analysis Extended BinEP Fitness Evaluation Analysis The EHW Engine with Systolic Array Acceleration Architecture Systolic Array Design at Function Level Systolic Array Design at Bit Level Scalability Design in Parallel Performance Evaluation Conclusion References Author Index This book constitutes the refereed proceedings of the 7th International Conference on Evolvable Systems, ICES 2007, held in Wuhan, China, in September 2007. The 41 revised full papers presented were carefully reviewed and selected from 123 submissions. The papers are organized in topical sections on digital hardware evolution, analog hardware evolution, bio-inspired systems, mechanical hardware evolution, evolutionary design, evolutionary algorithms in hardware design, and hardware implementation of evolutionary algorithms