Cryptographic Hardware and Embedded Systems - CHES 2002: 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers (Lecture Notes in Computer Science, 2523)

Thesearetheproceedingsofches2002,thefourthworkshoponcryptographic Hardware And Embedded Systems. After The ?rst Two Ches Workshops Held In Massachusetts, And The Third Held In Europe, This Is The ?rst Workshop On The West Coast Of The United States. There Was A Record Number Of Submissions This Year And In Response The Technical Program Was Extended To 3 Days. As Is Evident By The Papers In These Proceedings, There Have Been Again Many Excellent Submissions. Selecting The Papers For This Year’s Ches Was Not An Easy Task, And We Regret That We Could Not Accept Many Contributions Due To The Limited Availability Of Time. There Were 101 Submissions This Year, Of Which 39 Were Selected For Presentation. We Continue To Observe A Steady Increase Over Previous Years: 42 Submissions At Ches ’99, 51 At Ches 2000, And 66 At Ches 2001. We Interpret This As A Continuing Need For A Workshop Series That C- Bines Theory And Practice For Integrating Strong Security Features Into Modern Communicationsandcomputerapplications. Inadditiontothesubmittedcont- Butions, Jean-jacques Quisquater (ucl, Belgium), Sanjay Sarma (mit, Usa) And A Panel Of Experts On Hardware Random Number Generation Gave Invited Talks. As In The Previous Years, The Focus Of The Workshop Is On All Aspects Of Cr- Tographic Hardware And Embedded System Security. Of Special Interest Were C- Tributionsthatdescribenewmethodsfore?cienthardwareimplementationsand High-speed Software For Embedded Systems, E. G. , Smart Cards, Microprocessors, Dsps, Etc. Ches Also Continues To Be An Important Forum For New Theoretical And Practical ?ndings In The Important And Growing ?eld Of Side-channel Attacks. Invited Talk -- Ches: Past, Present, And Future -- Attack Strategies -- Optical Fault Induction Attacks -- Template Attacks -- The Em Side—channel(s) -- Finite Field And Modular Arithmetic I -- Enhanced Montgomery Multiplication -- New Algorithm For Classical Modular Inverse -- Increasing The Bitlength Of A Crypto-coprocessor -- Elliptic Curve Cryptography I -- Enhancing Simple Power-analysis Attacks On Elliptic Curve Cryptosystems -- Implementation Of Elliptic Curve Cryptography With Built-in Counter Measures Against Side Channel Attacks -- Secure Elliptic Curve Implementations: An Analysis Of Resistance To Power-attacks In A Dsp Processor -- Address-bit Differential Power Analysis Of Cryptographic Schemes Ok-ecdh And Ok-ecdsa -- Aes And Aes Candidates -- 2gbit/s Hardware Realizations Of Rijndael And Serpent: A Comparative Analysis -- Efficient Software Implementation Of Aes On 32-bit Platforms -- An Optimized S-box Circuit Architecture For Low Power Aes Design --^ Simplified Adaptive Multiplicative Masking For Aes -- Multiplicative Masking And Power Analysis Of Aes -- Tamper Resistance -- Keeping Secrets In Hardware: The Microsoft Xboxtm Case Study -- Rsa Implementation -- A Dpa Attack Against The Modular Reduction Within A Crt Implementation Of Rsa -- Further Results And Considerations On Side Channel Attacks On Rsa -- Fault Attacks On Rsa With Crt: Concrete Results And Practical Countermeasures -- Finite Field And Modular Arithmetic Ii -- Some Security Aspects Of The Mist Randomized Exponentiation Algorithm -- The Montgomery Powering Ladder -- Dpa Countermeasures By Improving The Window Method -- Efficient Subgroup Exponentiation In Quadratic And Sixth Degree Extensions -- Elliptic Curve Cryptography Ii -- On The Efficient Generation Of Elliptic Curves Over Prime Fields -- An End-to-end Systems Approach To Elliptic Curve Cryptography -- A Low-power Design For An Elliptic Curve Digital Signature Chip --^ A Reconfigurable System On Chip Implementation For Elliptic Curve Cryptography Over -- Genus Two Hyperelliptic Curve Coprocessor -- Random Number Generation -- True Random Number Generator Embedded In Reconfigurable Hardware -- Evaluation Criteria For True (physical) Random Number Generators Used In Cryptographic Applications -- A Hardware Random Number Generator -- Invited Talk -- Rfid Systems And Security And Privacy Implications -- New Primitives -- A New Class Of Invertible Mappings -- Finite Field And Modular Arithmetic Ii -- Scalable And Unified Hardware To Compute Montgomery Inverse In Gf(p) And Gf(2n) -- Dual-field Arithmetic Unit For Gf(p) And Gf(2m) -- Error Detection In Polynomial Basis Multipliers Over Binary Extension Fields -- Hardware Implementation Of Finite Fields Of Characteristic Three -- Elliptic Curve Cryptography Iii -- Preventing Differential Analysis In Glv Elliptic Curve Scalar Multiplication --^ Randomized Signed-scalar Multiplication Of Ecc To Resist Power Attacks -- Fast Multi-scalar Multiplication Methods On Elliptic Curves With Precomputation Strategy Using Montgomery Trick -- Hardware For Cryptanalysis -- Experience Using A Low-cost Fpga Design To Crack Des Keys -- A Time-memory Tradeo. Using Distinguished Points: New Analysis & Fpga Results. Burton S. Kaliski, Jr., Çetin K. Koç, Christof Paar (eds.). Includes Bibliographical References And Index. CHES: Past, Present, and Future....Pages 1-1 Optical Fault Induction Attacks....Pages 2-12 Template Attacks....Pages 13-28 The EM Side—Channel(s)....Pages 29-45 Enhanced Montgomery Multiplication....Pages 46-56 New Algorithm for Classical Modular Inverse....Pages 57-70 Increasing the Bitlength of a Crypto-Coprocessor....Pages 71-81 Enhancing Simple Power-Analysis Attacks on Elliptic Curve Cryptosystems....Pages 82-97 Implementation of Elliptic Curve Cryptography with Built-In Counter Measures against Side Channel Attacks....Pages 98-113 Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor....Pages 114-128 Address-Bit Differential Power Analysis of Cryptographic Schemes OK-ECDH and OK-ECDSA....Pages 129-143 2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis....Pages 144-158 Efficient Software Implementation of AES on 32-Bit Platforms....Pages 159-171 An Optimized S-Box Circuit Architecture for Low Power AES Design....Pages 172-186 Simplified Adaptive Multiplicative Masking for AES....Pages 187-197 Multiplicative Masking and Power Analysis of AES....Pages 198-212 Keeping Secrets in Hardware: The Microsoft Xbox TM Case Study....Pages 213-227 A DPA Attack against the Modular Reduction within a CRT Implementation of RSA....Pages 228-243 Further Results and Considerations on Side Channel Attacks on RSA....Pages 244-259 Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures....Pages 260-275 Some Security Aspects of the MIST Randomized Exponentiation Algorithm....Pages 276-290 The Montgomery Powering Ladder....Pages 291-302 DPA Countermeasures by Improving the Window Method....Pages 303-317 Efficient Subgroup Exponentiation in Quadratic and Sixth Degree Extensions....Pages 318-332 On the Efficient Generation of Elliptic Curves over Prime Fields....Pages 333-348 An End-to-End Systems Approach to Elliptic Curve Cryptography....Pages 349-365 A Low-Power Design for an Elliptic Curve Digital Signature Chip....Pages 366-380 Genus Two Hyperelliptic Curve Coprocessor....Pages 381-399 True Random Number Generator Embedded in Reconfigurable Hardware....Pages 400-414 Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications....Pages 415-430 A Hardware Random Number Generator....Pages 431-449 RFID Systems and Security and Privacy Implications....Pages 450-453 A New Class of Invertible Mappings....Pages 454-469 Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2 n )....Pages 470-483 Dual-Field Arithmetic Unit for GF ( p ) and GF (2 m )....Pages 484-499 Error Detection in Polynomial Basis Multipliers over Binary Extension Fields....Pages 500-514 Hardware Implementation of Finite Fields of Characteristic Three....Pages 515-528 Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication....Pages 529-539 Randomized Signed-Scalar Multiplication of ECC to Resist Power Attacks....Pages 540-550 Fast Multi-scalar Multiplication Methods on Elliptic Curves with Precomputation Strategy Using Montgomery Trick....Pages 551-563 Experience Using a Low-Cost FPGA Design to Crack DES Keys....Pages 564-578 A Time-Memory Tradeo. Using Distinguished Points: New Analysis & FPGA Results....Pages 579-592 ....Pages 593-609 This book constitutes the thoroughly refereed post-proceedings of the 4th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2002, held in Redwood Shores, California, USA in August 2002. The 41 revised full papers presented together with two invited contributions were carefully selected from 101 submissions during two rounds of reviewing and revision. The papers are organized in topical sections on attack strategies, finite field and modular arithmetic, elliptic curve cryptography, AES and AES candidates, tamper resistance, RSA implementation, random number generation, new primitives, hardware for cryptanalysis