An Introduction to Mixed-Signal IC Test and Measurement (Oxford Series in Electrical and Computer Engineering (Hardco)

With the proliferation of complex semiconductor devices containing digital, analog, mixed-signal, and radio-frequency circuits, today's engineer must be fluent in all four circuit types. Written for advanced undergraduate and graduate-level students, as well as engineering professionals, __An____Introduction to Mixed-Signal IC Test and Measurement__, Second Edition, encompasses analog, mixed-signal and radio-frequency circuits tests, with many relevant industrial examples. The text assumes a solid background in analog and digital circuits and a working knowledge of computers and computer programming.__An Introduction to Mixed-Signal IC Test and Measurement__, Second Edition, includes examples and illustrations--featuring state-of-the-art industrial technology--to enrich and enliven the text. The book also introduces large-scale mixed-signal circuit and individual circuit tests, discusses the value-added benefits of mixed-signal IC testing to a manufacturer's product, and clearly defines the role of the test engineer.New to This Edition\* A new chapter on RF Test Methods and Fundamentals of RF Testing\* A new chapter on Clock and Serial Data Communications Channel Measurements\* Coverage of RF load board design\* New coverage of probabilistic reasoning for mixed-signal testing Front Matter 1 Preface 3 Table of Contents 10 1. Overview of Mixed-Signal Testing 24 1.1 Mixed-Signal Circuits 24 1.1.1 Analog, Digital, or Mixed-Signal? 24 1.1.2 Common Types of Analog and Mixed-Signal Circuits 25 1.1.3 Applications of Mixed-Signal Circuits 26 1.2 Why Test Mixed-Signal Devices? 28 1.2.1 The CMOS Fabrication Process 28 1.2.2 Real-World Circuits 29 1.2.3 What is a Test Engineer? 31 1.3 Post-Silicon Production Flow 32 1.3.1 Test and Packaging 32 1.3.2 Characterization versus Production Testing 33 1.4 Test and Diagnostic Equipment 34 1.4.1 Automated Test Equipment 34 1.4.2 Wafer Probers 35 1.4.3 Handlers 35 1.4.4 E-Beam Probers 36 1.4.5 Focused Ion Beam Equipment 36 1.4.6 Forced-Temperature Systems 36 1.5 New Product Development 37 1.5.1 Concurrent Engineering 37 1.6 Mixed-Signal Testing Challenges 38 1.6.1 Time to Market 38 1.6.2 Accuracy, Repeatability, and Correlation 38 1.6.3 Electromechanical Fixturing Challenges 39 1.6.4 Economics of Production Testing 39 Problems 40 References 41 2. Tester Hardware 42 2.1 Mixed-Signal Tester Overview 42 2.1.1 General-Purpose Testers versus Focused Bench Equipment 42 2.1.2 Generic Tester Architecture 43 2.2 DC Resources 43 2.2.1 General-Purpose Multimeters 43 2.2.2 General-Purpose Voltage/Current Sources 45 2.2.3 Precision Voltage References and User Supplies 46 2.2.4 Calibration Source 47 2.2.5 Relay Matrices 47 2.2.6 Relay Control Lines 48 2.3 Digital Subsystem 49 2.3.1 Digital Vectors 49 2.3.2 Digital Signals 49 2.3.3 Source Memory 49 2.3.4 Capture Memory 50 2.3.5 Pin Card Electronics 50 2.3.6 Timing and Formatting Electronics 51 2.4 AC Source and Measurement 54 2.4.1 AC Continuous-Wave Source and AC Meter 54 2.4.2 Arbitrary Waveform Generators 54 2.4.3 Waveform Digitizers 55 2.4.4 Clocking and Synchronization 55 2.5 Time Measurement System 57 2.5.1 Time Measurements 57 2.5.2 Time Measurement Interconnects 57 2.6 RF Subsystem 57 2.6.1 Source Path 57 2.6.2 Measurement Path 58 2.7 Computing Hardware 59 2.7.1 User Computer 59 2.7.2 Tester Computer 59 2.7.3 Array Processors and Distributed Digital Signal Processors 60 2.7.4 Network Connectivity 60 2.8 Summary 60 Problems 60 3. DC and Parametric Measurements 62 3.1 Continuity 62 3.1.1 Purpose of Continuity Testing 62 3.1.2 Continuity Test Technique 63 3.1.3 Serial versus Parallel Continuity Testing 65 3.2 Leakage Currents 66 3.2.1 Purpose of Leakage Testing 66 3.2.2 Leakage Test Technique 67 3.2.3 Serial versus Parallel Leakage Testing 67 3.3 Power Supply Currents 67 3.3.1 Importance of Supply Current Tests 67 3.3.2 Test Techniques 68 3.4 DC References and Regulators 69 3.4.1 Voltage Regulators 69 3.4.2 Voltage References 70 3.4.3 Trimmable References 70 3.5 Impedance Measurements 71 3.5.1 Input Impedance 71 3.5.2 Output Impedance 74 3.5.3 Differential Impedance Measurements 74 3.6 DC Offset Measurements 75 3.6.1 V_MID and Analog Ground 75 3.6.2 DC Transfer Characteristics 76 3.6.3 Output Offset Voltage 76 3.6.4 Single-Ended, Differential, and Common-Mode Offsets 77 3.6.5 Input Offset Voltage 79 3.7 DC Gain Measurements 80 3.7.1 Closed-Loop Gain 80 3.7.2 Open-Loop Gain 82 3.8 DC Power Supply Rejection Ratio 85 3.8.1 DC Power Supply Sensitivity 85 3.8.2 DC Power Supply Rejection Ratio 86 3.9 DC Common-Mode Rejection Ratio 87 3.9.1 CMRR of Op Amps 87 3.9.2 CMRR of Differential Gain Stages 89 3.10 Comparator DC Tests 91 3.10.1 Input Offset Voltage 91 3.10.2 Threshold Voltage 91 3.10.3 Hysteresis 92 3.11 Voltage Search Techniques 93 3.11.1 Binary Searches versus Step Searches 93 3.11.2 Linear Searches 94 3.12 DC Tests for Digital Circuits 98 3.12.1 I_IH/I_IL 98 3.12.2 V_IH/V_IL 98 3.12.3 V_OH/V_OL 98 3.12.4 I_OH/I_OL 98 3.12.5 I_OSH and I_OSL Short-Circuit Current 98 3.13 Summary 99 Problems 99 References 101 4. Data Analysis and Probability Theory 102 4.1 Data Visualization Tools 102 4.1.1 Datalogs 102 4.1.2 Lot Summaries 103 4.1.3 Wafer Maps 105 4.1.4 Shmoo Plots 106 4.1.5 Histograms 108 4.2 Statistical Analysis 109 4.2.1 Mean 109 4.2.2 Probabilities and Probability Density Functions 111 4.2.3 The Standard Gaussian Cumulative Distribution Function Phi 114 4.2.4 Verifying Gaussian Behavior: The Kurtosis and Normal Probability Plot 119 4.3 Non-Gaussian Distributions Found in Mixed-Signal Test 122 4.3.1 The Uniform Probability Distribution 122 4.3.2 The Sinusoidal Probability Distribution 124 4.3.3 The Binomial Probability Distribution 127 4.4 Modeling the Structure of Randomness 129 4.4.1 Modeling a Gaussian Mixture Using the Expectation-Maximization Algorithm 130 4.4.2 Probabilities Associated with a Gaussian Mixture Model 136 4.5 Sums and Differences of Random Variables 139 4.5.1 The Central Limit Theorem 143 4.6 Summary 145 Problems 145 References 149 5. Yield, Measurement Accuracy, and Test Time 150 5.1 Yield 150 5.2 Measurement Terminology 152 5.2.1 Accuracy and Precision 152 5.2.2 Systematic or Bias Errors 153 5.2.3 Random Errors 153 5.2.4 Resolution 154 5.2.5 Repeatability 155 5.2.6 Stability 155 5.2.7 Correlation 155 5.2.7.1 Tester-to-Bench Correlation 156 5.2.7.2 Tester-to-Tester Correlation 156 5.2.7.3 Program-to-Program Correlation 156 5.2.7.4 DIB-to-DIB Correlation 156 5.2.7.5 Day-to-Day Correlation 157 5.2.8 Reproducibility 157 5.3 A Mathematical Look at Repeatability, Bias, and Accuracy 157 5.4 Calibrations and Checkers 165 5.4.1 Traceability to Standards 165 5.4.2 Hardware Calibration 165 5.4.3 Software Calibration 166 5.4.4 System Calibrations and Checkers 168 5.4.5 Focused Instrument Calibrations 169 5.4.6 Focused DIB Circuit Calibrations 172 5.5 Tester Specifications 174 5.6 Reducing Measurement Error with Greater Measurement Time 176 5.6.1 Analog Filtering 176 5.6.2 Averaging 178 5.7 Guardbands 179 5.8 Effects of Measurement Variability on Test Yield 184 5.9 Effects of Reproducibilty and Process Variation on Yield 187 5.10 Statistical Process Control 190 5.10.1 Goals of SPC 190 5.10.2 Six-Sigma Quality 191 5.10.3 Process Capability: C_p, and C_pk 192 5.10.4 Gauge Repeatability and Reproducibility 193 5.11 Summary 194 Problems 195 References 198 6. DAC Testing 199 6.1 Basics of Data Converters 200 6.1.1 Principles of DAC and ADC Conversion 200 6.1.2 Data Formats 204 6.1.3 Comparison of DACs and ADCs 208 6.1.4 DAC Failure Mechanisms 208 6.2 Basic DC Tests 209 6.2.1 Code-Specific Parameters 209 6.2.2 Full-Scale Range 209 6.2.3 DC Gain, Gain Error, Offset, and Offset Error 209 6.2.4 LSB Step Size 212 6.2.5 DC PSS 212 6.3 Transfer Curve Tests 213 6.3.1 Absolute Error 213 6.3.2 Monotonicity 214 6.3.3 Differential Nonlinearity 215 6.3.4 Integral Nonlinearity 217 6.3.5 Partial Transfer Curves 220 6.3.6 Major Carrier Testing 220 6.3.7 Other Selected-Code Techniques 223 6.4 Dynamic DAC Tests 224 6.4.1 Conversion Time 224 6.4.2 Overshoot and Undershoot 225 6.4.3 Rise Time and Fall Time 226 6.4.4 DAC-to-DAC Skew 226 6.4.5 Glitch Energy 226 6.4.6 Clock and Data Feedthrough 227 6.5 Tests for Common DAC Applications 228 6.5.1 DC References 228 6.5.2 Audio Reconstruction 228 6.5.3 Data Modulation 229 6.5.4 Video Signal Generators 229 6.6 Summary 230 Problems 230 References 233 7. ADC Testing 234 7.1 ADC Testing versus DAC Testing 234 7.1.1 Comparison of DACs and ADCs 234 7.1.2 Statistical Behavior of ADCs 234 7.2 ADC Code Edge Measurements 239 7.2.1 Edge Code Testing versus Center Code Testing 239 7.2.2 Step Search and Binary Search Methods 240 7.2.3 Servo Method 240 7.2.4 Linear Ramp Histogram Method 241 7.2.5 Conversion from Histograms to Code Edge Transfer Curves 243 7.2.6 Accuracy Limitations of Histogram Testing 244 7.2.7 Rising Ramps versus Falling Ramps 246 7.2.8 Sinusoidal Histogram Method 247 7.3 DC Tests and Transfer Curve Tests 256 7.3.1 DC Gain and Offset 256 7.3.2 INL and DNL 257 7.3.3 Monotonicity and Missing Codes 259 7.4 Dynamic ADC Tests 261 7.4.1 Conversion Time, Recovery Time, and Sampling Frequency 261 7.4.2 Aperture Jitter 263 7.4.3 Sparkling 263 7.5 Tests for Common ADC Applications 264 7.5.1 DC Measurements 264 7.5.2 Audio Digitization 264 7.5.3 Data Transmission 264 7.5.4 Video Digitization 265 7.6 Summary 265 Problems 265 References 267 8. Sampling Theory 269 8.1 Analog Measurements Using DSP 269 8.1.1 Traditional versus DSP-Based Testing of AC Parameters 269 8.2 Sampling and Reconstruction 270 8.2.1 Use of Sampling and Reconstruction in Mixed-Signal Testing 270 8.2.2 Sampling: Continuous-Time and Discrete-Time Representation 270 8.2.3 Reconstruction 274 8.2.4 The Sampling Theorem and Aliasing 278 8.2.5 Quantization Effects 281 8.2.6 Sampling Jitter 287 8.3 Repetitive Sample Sets 294 8.3.1 Finite and Infinite Sample Sets 294 8.3.2 Coherent Signals and Noncoherent Signals 295 8.3.3 Peak-to-RMS Control in Coherent Multitones 297 8.3.4 Spectral Bin Selection 298 8.4 Synchronization of Sampling Systems 303 8.4.1 Simultaneous Testing of Multiple Sampling Systems 303 8.4.2 ATE Clock Sources 304 8.5 Summary 306 Problems 306 References 308 9. DSP-Based Testing 309 9.1 Advantages of DSP-Based Testing 309 9.1.1 Reduced Test Time 309 9.1.2 Separation of Signal Components 310 9.1.3 Advanced Signal Manipulations 310 9.2 Digital Signal Processing 310 9.2.1 DSP and Array Processing 310 9.2.2 Fourier Analysis of Periodic Signals 311 9.2.3 The Trigonometric Fourier Series 312 9.2.4 The Discrete-Time Fourier Series 315 9.2.5 Complete Frequency Spectrum 325 9.2.6 Time and Frequency Denormalization 328 9.2.7 Complex Form of the DTFS 329 9.3 Discrete-Time Transforms 331 9.3.1 The Discrete Fourier Transform 331 9.3.2 The Fast Fourier Transform 335 9.3.3 Interpreting the FFT Output 336 9.3.4 Windowing 344 9.4 The Inverse FFT 356 9.4.1 Equivalence of Time- and Frequency-Domain Information 356 9.4.2 Parseval's Theorem 359 9.4.3 Frequency-Domain Filtering 360 9.4.4 Noise Weighting 361 9.5 Summary 362 Problems 363 References 367 10. Analog Channel Testing 368 10.1 Overview 368 10.1.1 Types of Analog Channels 368 10.1.2 Types of AC Parametric Tests 369 10.2 Gain and Level Tests 369 10.2.1 Absolute Voltage Levels 369 10.2.2 Absolute Gain and Gain Error 373 10.2.3 Gain Tracking Error 375 10.2.4 PGA Gain Tests 375 10.2.5 Frequency Response 380 10.3 Phase Tests 388 10.3.1 Phase Response 388 10.3.2 Group Delay and Group Delay Distortion 392 10.4 Distortion Tests 394 10.4.1 Signal-to-Harmonic Distortion 394 10.4.2 Intermodulation Distortion 397 10.4.3 Adjacent Channel and Noise Power Ratio Tests 398 10.5 Signal Rejection Tests 400 10.5.1 Common-Mode Rejection Ratio 400 10.5.2 Power Supply Rejection and Power Supply Rejection Ratio 402 10.5.3 Channel-to-Channel Crosstalk 404 10.5.4 Clock and Data Feedthrough 407 10.6 Noise Tests 408 10.6.1 Noise 408 10.6.2 Idle Channel Noise 408 10.6.3 Signal to Noise, Signal to Noise and Distortion 410 10.6.4 Spurious Free Dynamic Range 413 10.7 Summary 413 Problems 414 11. Sampled Channel Testing 418 11.1 Overview 418 11.1.1 What are Sampled Channels? 418 11.1.2 Examples of Sampled Channels 419 11.1.3 Types of Sampled Channels 421 11.2 Sampling Considerations 423 11.2.1 DUT Sampling Rate Constraints 423 11.2.2 Digital Signal Source and Capture 424 11.2.3 Simultaneous DAC and ADC Channel Testing 428 11.2.4 Mismatched Fundamental Frequencies 431 11.2.5 Reconstruction Effects in DACs, AWGs, and other Sampled-Data Circuits 435 11.3 Undersampling and Aliasing 439 11.3.1 Reconstructing the High-Frequency Signal from the Aliased Sample Set 441 11.4 Encoding and Decoding 447 11.4.1 Signal Creation and Analysis 447 11.4.2 Intrinsic 448 11.5 Sampled Channel Tests 451 11.5.1 Similarity to Analog Channel Tests 451 11.5.2 Absolute Level, Absolute Gain, Gain Error, and Gain Tracking 453 11.5.3 Frequency Response 457 11.5.4 Phase Response 460 11.5.5 Group Delay and Group Delay Distortion 461 11.5.6 Signal to Harmonic Distortion and Intermodulation Distortion 461 11.5.7 Crosstalk 462 11.5.8 CMRR 463 11.5.9 PSR and PSRR 463 11.5.10 Signal-to-Noise Ratio and ENOB 463 11.5.11 Idle Channel Noise 464 11.6 Summary 465 Problems 465 References 468 12. Fundamentals of RF Testing 469 12.1 Introduction to RF Testing 469 12.2 Scalar versus Vector Measures 471 12.2.1 Wave Definition of Electrical Signals 471 12.2.2 Measures of Electrical Waves 472 12.2.3 Power Definition 475 12.2.4 Crest Factor 479 12.2.5 Power in dBm 482 12.2.6 Power Transfer 483 12.2.6.1 Maximum Power Transfer 484 12.2.7 Conjugate and Reflectionless Matching 487 12.2.8 Power Loss Metrics 488 12.2.8.1 Insertion Loss 488 12.2.8.2 Transducer Loss 489 12.3 Noise 490 12.3.1 Amplitude Noise 492 12.3.1.1 Thermal Noise 492 12.3.1.2 Shot Noise 493 12.3.1.3 Flicker Noise 493 12.3.2 Noise Figure 494 12.3.3 Phase Noise 497 12.3.3.1 Fundamentals 497 12.3.3.2 Spectral Density of Phase Fluctuations 498 12.3.3.3 Spectral Density of Frequency Fluctuations 501 12.3.3.4 Integrated Frequency and Phase Noise 502 12.3.3.5 Jitter and Integrated Phase Noise 502 12.4 S-Parameters 504 12.4.1 Principles of S-Parameters of a Two-Port Network 504 12.4.2 Scalar Representation of S-Parameters 509 12.4.2.1 Voltage Standing Wave Ratio 509 12.4.2.2 Reflection Coefficient 511 12.4.2.3 Return Loss 512 12.4.2.4 Mismatch Loss 513 12.4.2.5 Mismatch Uncertainty 514 12.4.2.6 Reducing Measurement Uncertainty 521 12.4.2.7 Insertion Loss 524 12.5 Modulation 527 12.5.1 Analog Modulation 527 12.5.1.1 Amplitude Modulation 527 12.5.1.2 Frequency Modulation 529 12.5.1.3 Phase Modulation 532 12.5.2 Digital Modulation 534 12.5.2.1 Amplitude Shift Keying 535 12.5.2.2 Frequency Shift Keying 535 12.5.2.3 Phase Shift Keying 536 12.5.2.4 Constellation Diagram 536 12.5.3 Quadrature Amplitude Modulation 537 12.5.4 Orthogonal Frequency Division Multiplexing 537 12.6 Summary 539 Problems 540 References 542 13. RF Test Methods 544 13.1 Scalar Measurement Methods 545 13.1.1 Principles of a Scalar Power Measurement 545 13.1.1.1 Calorimetric Power Sensor 545 13.1.1.2 Superheterodyne Power Sensor 546 13.1.1.3 Zero-IF with Sampling Power Sensor 547 13.1.2 Gain Measurement 551 13.1.3 Scalar Power Measures versus Time 559 13.1.4 Intermodulation Measurement 561 13.1.5 Compression Point Measurement 566 13.1.5.1 Go-No-Go Method 566 13.1.5.2 Binary Search Method 566 13.1.5.3 Interpolation Method 567 13.1.5.4 Modulation Method 570 13.2 S-Parameter Measurements 571 13.2.1 Principles of a Directional Coupler 571 13.2.2 Directional Couplers on an ATE 573 13.3 Noise Figure and Noise Factor 574 13.3.1 Noise Figure and Noise Factor Definition 574 13.3.2 Noise Measurement Technique with the Y-Factor Method 576 13.3.3 Noise Measurement Technique with the Cold Noise Method 578 13.3.4 Comparison of the Noise Figure Test Methods 578 13.4 Phase Noise 580 13.4.1 Measuring Phase Noise Using Spectral Analysis 581 13.4.2 PLL-Based Phase Noise Test Method 586 13.4.3 Delay-Line Phase Noise Test Method 588 13.4.3.1 Comparison of the Phase Noise Test Methods 589 13.5 Vector Signal Analysis 589 13.5.1 In-Phase and Quadrature Signal Representation 591 13.5.2 Test of Relative Phase 591 13.5.3 Error Vector Magnitude Test Method 596 13.5.4 Adjacent Channel Power Tests 598 13.5.4.1 Modulated Sources 599 13.5.4.2 Modulation Measurements 600 13.5.5 Transmit Mask 601 13.5.6 Bit Error Rate 601 13.6 Summary 603 Problems 604 References 607 14. Clock and Serial Data Communications Channel Measurements 608 14.1 Synchronous and Asynchronous Communications 608 14.2 Time-Domain Attributes of a Clock Signal 610 14.3 Frequency-Domain Attributes of a Clock Signal 615 14.4 Communicating Serially over a Channel 621 14.4.1 Ideal Channel 622 14.4.2 Real Channel Effects 623 14.4.2.1 Noisy Channel 624 14.4.2.2 Dispersive Channel 625 14.4.2.3 Transmitter Limitations 628 14.4.2.4 Jitter Classifications 628 14.4.3 Impact of Decision Levels on Receiver Performance 629 14.4.3.1 Received Voltage Decision Level, VTH 629 14.4.3.2 Received Zero-Crossing Decision Level, t_TH 632 14.4.3.3 Combined Effect of Varying Received Voltage Level Decision V_TH and Zero-Crossing Decision Level, t_TH 633 14.5 Bit Error Rate Measurement 634 14.5.1 PRBS Test Patterns 640 14.6 Methods to Speed Up BER Tests in Production 644 14.6.1 Amplitude-Based Scan Test 644 14.6.2 Time-Based Scan Test 651 14.6.3 Dual-Dirac Jitter Decomposition Method 653 14.6.3.1 Total Jitter Definition 659 14.6.4 Gaussian Mixture Jitter Decomposition Method 661 14.7 Deterministic Jitter Decomposition 667 14.7.1 Period and Sinusoidal Jitter 667 14.7.2 Data-Dependent Jitter 670 14.7.3 Bounded and Uncorrelated Jitter 672 14.8 Jitter Transmission Tests 678 14.8.1 Jitter Transfer Test 678 14.8.1.1 Coherent Jitter Generation 679 14.8.1.2 Coherent Phase Extraction Using Analytic Signal Representation 682 14.8.1.3 Final Comments 688 14.8.2 Jitter Tolerance Test 689 14.9 Summary 696 Problems 697 References 703 15. Tester Interfacing - DIB Design 704 15.1 DIB Basics 704 15.1.1 Purpose of a Device Interface Board 704 15.1.2 DIB Configurations 706 15.1.3 Importance of Good DIB Design 707 15.2 Printed Circuit Boards 707 15.2.1 Prototype DIBs versus PCB DIBs 707 15.2.2 PCB CAD Tools 708 15.2.3 Multilayer PCBs 709 15.2.4 PCB Materials 710 15.3 DIB Traces, Shields, and Guards 711 15.3.1 Trace Parasitics 711 15.3.2 Trace Resistance 711 15.3.3 Trace Inductance 712 15.3.4 Trace Capacitance 717 15.3.5 Shielding 723 15.3.6 Driven Guards 724 15.4 Transmission Lines 725 15.4.1 Various TEM Transmission Line Configurations 725 15.4.1.1 Coaxial Line 725 15.4.1.2 Stripline 726 15.4.1.3 Microstrip Line 726 15.4.1.4 Coplanar Waveguide 727 15.4.1.5 Coupled Transmission Lines 727 15.4.2 Transmission Line Discontinuities 728 15.4.3 Lumped- and Distributed-Element Models 729 15.4.4 Transmission Line Termination 733 15.4.5 Parasitic Lumped Elements 737 15.5 Impedance Matching Techniques for RF DIB 738 15.5.1 Introduction to the Smith Chart 738 15.5.2 Impedance Smith Chart 740 15.5.3 Admittance Smith Chart 743 15.5.4 Immitance Smith Chart 744 15.5.5 Impedance Transformation with Discrete Components on Smith Chart 745 15.5.6 Impedance Matching with a Series and Shunt Component Using the Immitance Smith Chart 748 15.6 Grounding and Power Distribution 751 15.6.1 Grounding 751 15.6.2 Power Distribution 752 15.6.3 Power and Ground Planes 753 15.6.4 Ground Loops 755 15.7 DIB Components 756 15.7.1 DUT Sockets and Contactor Assemblies 756 15.7.2 Contact Pads, Pogo Pins, and Socket Pins 757 15.7.3 Electromechanical Relays 759 15.7.4 Socket Pins 761 15.7.5 Resistors 762 15.7.6 Capacitors 764 15.7.7 Inductors and Ferrite Beads 768 15.7.8 Transformers and Power Splitters 771 15.8 Common DIB Circuits 772 15.8.1 Analog Buffers 772 15.8.2 Instrumentation Amplifiers 772 15.8.3 V_MID Reference Adder 774 15.8.4 Current-to-Voltage and Voltage-to-Current Conversions 775 15.8.5 Power Supply Ripple Circuits 776 15.9 Common DIB Mistakes 778 15.9.1 Poor Power Supply and Ground Layout 778 15.9.2 Crosstalk 778 15.9.3 Transmission Line Discontinuities 779 15.9.4 Resistive Drops in Circuit Traces 779 15.9.5 Tester Instrument Parasitics 780 15.9.6 Oscillations in Active Circuits 780 15.9.7 Poor DIB Component Placement and PCB Layout 780 15.10 Summary 781 Problems 781 References 783 16. Design for Test 784 16.1 Overview 784 16.1.1 What is DfT? 784 16.1.2 Built-in Self-Test 785 16.1.3 Differences between Digital DfT and Analog DfT 785 16.1.4 Why Should We Use DfT? 786 16.2 Advantages of DfT 786 16.2.1 Lower Cost of Test 786 16.2.2 Increased Fault Coverage and Improved Process Control 788 16.2.3 Diagnostics and Characterization 788 16.2.4 System-Level Diagnostics 789 16.3 Digital Scan 789 16.3.1 Scan Basics 789 16.3.2 IEEE Std. 1149.1 Standard Test Access Port and Boundary Scan 790 16.3.3 Full Scan and Partial Scan 793 16.4 Digital BIST 794 16.4.1 Pseudorandom BILBO Circuits 794 16.4.2 Memory BIST 796 16.4.3 Microcode BIST 797 16.5 Digital DfT for Mixed-Signal Circuits 797 16.5.1 Partitioning 797 16.5.2 Digital Resets and Presets 798 16.5.3 Device-Driven Timing 799 16.5.4 Lengthy Preamble 801 16.6 Mixed-Signal Boundary Scan and BIST 801 16.6.1 Mixed-Signal Boundary Scan 801 16.6.2 Analog and Mixed-Signal BIST 803 16.7 Ad Hoc Mixed-Signal DfT 804 16.7.1 Common Concepts 804 16.7.2 Accessibility of Analog Signals 805 16.7.3 Analog Test Buses, T-Switches, and Bypass Modes 806 16.7.4 Separation of Analog and Digital Blocks 808 16.7.5 Loopback Modes 811 16.7.6 Precharging Circuits and AC Coupling Shorts 811 16.7.7 On-Chip Sampling Circuits 813 16.7.8 PLL Testability Circuits 813 16.7.9 DAC and ADC Converters 814 16.8 RF DfT 815 16.8.1 RF Loopback Test 815 16.8.2 RF BIT and BIST 816 16.8.3 Correlation-Based Test 818 16.8.3.1 DC-to-RF Correlation 819 16.8.3.2 Analog-to-RF Correlation 820 16.9 Summary 821 Problems 821 References 823 Appendices 826 Appendix A: Gaussian Cumulative Distribution Function Values Phi 826 Answers to Problems 827 Index 841 A 841 B 844 C 845 D 849 E 852 F 854 G 856 H 857 I 858 J 860 K 860 L 860 M 862 N 864 O 865 P 866 Q 870 R 870 S 872 T 878 U 880 V 881 W 882 Y 883 Z 883 Front Matter......Page 1 Preface......Page 3 Table of Contents......Page 10 1.1.1 Analog, Digital, or Mixed-Signal?......Page 24 1.1.2 Common Types of Analog and Mixed-Signal Circuits......Page 25 1.1.3 Applications of Mixed-Signal Circuits......Page 26 1.2.1 The CMOS Fabrication Process......Page 28 1.2.2 Real-World Circuits......Page 29 1.2.3 What is a Test Engineer?......Page 31 1.3.1 Test and Packaging......Page 32 1.3.2 Characterization versus Production Testing......Page 33 1.4.1 Automated Test Equipment......Page 34 1.4.3 Handlers......Page 35 1.4.6 Forced-Temperature Systems......Page 36 1.5.1 Concurrent Engineering......Page 37 1.6.2 Accuracy, Repeatability, and Correlation......Page 38 1.6.4 Economics of Production Testing......Page 39 Problems......Page 40 References......Page 41 2.1.1 General-Purpose Testers versus Focused Bench Equipment......Page 42 2.2.1 General-Purpose Multimeters......Page 43 2.2.2 General-Purpose Voltage/Current Sources......Page 45 2.2.3 Precision Voltage References and User Supplies......Page 46 2.2.5 Relay Matrices......Page 47 2.2.6 Relay Control Lines......Page 48 2.3.3 Source Memory......Page 49 2.3.5 Pin Card Electronics......Page 50 2.3.6 Timing and Formatting Electronics......Page 51 2.4.2 Arbitrary Waveform Generators......Page 54 2.4.4 Clocking and Synchronization......Page 55 2.6.1 Source Path......Page 57 2.6.2 Measurement Path......Page 58 2.7.2 Tester Computer......Page 59 Problems......Page 60 3.1.1 Purpose of Continuity Testing......Page 62 3.1.2 Continuity Test Technique......Page 63 3.1.3 Serial versus Parallel Continuity Testing......Page 65 3.2.1 Purpose of Leakage Testing......Page 66 3.3.1 Importance of Supply Current Tests......Page 67 3.3.2 Test Techniques......Page 68 3.4.1 Voltage Regulators......Page 69 3.4.3 Trimmable References......Page 70 3.5.1 Input Impedance......Page 71 3.5.3 Differential Impedance Measurements......Page 74 3.6.1 V_MID and Analog Ground......Page 75 3.6.3 Output Offset Voltage 嘀开伀Ⰰ伀匀......Page 76 3.6.4 Single-Ended, Differential, and Common-Mode Offsets......Page 77 3.6.5 Input Offset Voltage 嘀开䤀一Ⰰ伀匀......Page 79 3.7.1 Closed-Loop Gain......Page 80 3.7.2 Open-Loop Gain......Page 82 3.8.1 DC Power Supply Sensitivity......Page 85 3.8.2 DC Power Supply Rejection Ratio......Page 86 3.9.1 CMRR of Op Amps......Page 87 3.9.2 CMRR of Differential Gain Stages......Page 89 3.10.2 Threshold Voltage......Page 91 3.10.3 Hysteresis......Page 92 3.11.1 Binary Searches versus Step Searches......Page 93 3.11.2 Linear Searches......Page 94 3.12.5 I_OSH and I_OSL Short-Circuit Current......Page 98 Problems......Page 99 References......Page 101 4.1.1 Datalogs 䐀愀琀愀 䰀椀猀琀猀......Page 102 4.1.2 Lot Summaries......Page 103 4.1.3 Wafer Maps......Page 105 4.1.4 Shmoo Plots......Page 106 4.1.5 Histograms......Page 108 4.2.1 Mean 䄀瘀攀爀愀最攀 and Standard Deviation 嘀愀爀椀愀渀挀攀......Page 109 4.2.2 Probabilities and Probability Density Functions......Page 111 4.2.3 The Standard Gaussian Cumulative Distribution Function Phi 稀......Page 114 4.2.4 Verifying Gaussian Behavior: The Kurtosis and Normal Probability Plot......Page 119 4.3.1 The Uniform Probability Distribution......Page 122 4.3.2 The Sinusoidal Probability Distribution......Page 124 4.3.3 The Binomial Probability Distribution......Page 127 4.4 Modeling the Structure of Randomness......Page 129 4.4.1 Modeling a Gaussian Mixture Using the Expectation-Maximization Algorithm......Page 130 4.4.2 Probabilities Associated with a Gaussian Mixture Model......Page 136 4.5 Sums and Differences of Random Variables......Page 139 4.5.1 The Central Limit Theorem......Page 143 Problems......Page 145 References......Page 149 5.1 Yield......Page 150 5.2.1 Accuracy and Precision......Page 152 5.2.3 Random Errors......Page 153 5.2.4 Resolution 儀甀愀渀琀椀稀愀琀椀漀渀 䔀爀爀漀爀......Page 154 5.2.7 Correlation......Page 155 5.2.7.4 DIB-to-DIB Correlation......Page 156 5.3 A Mathematical Look at Repeatability, Bias, and Accuracy......Page 157 5.4.2 Hardware Calibration......Page 165 5.4.3 Software Calibration......Page 166 5.4.4 System Calibrations and Checkers......Page 168 5.4.5 Focused Instrument Calibrations......Page 169 5.4.6 Focused DIB Circuit Calibrations......Page 172 5.5 Tester Specifications......Page 174 5.6.1 Analog Filtering......Page 176 5.6.2 Averaging......Page 178 5.7 Guardbands......Page 179 5.8 Effects of Measurement Variability on Test Yield......Page 184 5.9 Effects of Reproducibilty and Process Variation on Yield......Page 187 5.10.1 Goals of SPC......Page 190 5.10.2 Six-Sigma Quality......Page 191 5.10.3 Process Capability: C_p, and C_pk......Page 192 5.10.4 Gauge Repeatability and Reproducibility......Page 193 5.11 Summary......Page 194 Problems......Page 195 References......Page 198 6. DAC Testing......Page 199 6.1.1 Principles of DAC and ADC Conversion......Page 200 6.1.2 Data Formats......Page 204 6.1.4 DAC Failure Mechanisms......Page 208 6.2.3 DC Gain, Gain Error, Offset, and Offset Error......Page 209 6.2.5 DC PSS......Page 212 6.3.1 Absolute Error......Page 213 6.3.2 Monotonicity......Page 214 6.3.3 Differential Nonlinearity......Page 215 6.3.4 Integral Nonlinearity......Page 217 6.3.6 Major Carrier Testing......Page 220 6.3.7 Other Selected-Code Techniques......Page 223 6.4.1 Conversion Time 匀攀琀琀氀椀渀最 吀椀洀攀......Page 224 6.4.2 Overshoot and Undershoot......Page 225 6.4.5 Glitch Energy 䜀氀椀琀挀栀 䤀洀瀀甀氀猀攀......Page 226 6.4.6 Clock and Data Feedthrough......Page 227 6.5.2 Audio Reconstruction......Page 228 6.5.4 Video Signal Generators......Page 229 Problems......Page 230 References......Page 233 7.1.2 Statistical Behavior of ADCs......Page 234 7.2.1 Edge Code Testing versus Center Code Testing......Page 239 7.2.3 Servo Method......Page 240 7.2.4 Linear Ramp Histogram Method......Page 241 7.2.5 Conversion from Histograms to Code Edge Transfer Curves......Page 243 7.2.6 Accuracy Limitations of Histogram Testing......Page 244 7.2.7 Rising Ramps versus Falling Ramps......Page 246 7.2.8 Sinusoidal Histogram Method......Page 247 7.3.1 DC Gain and Offset......Page 256 7.3.2 INL and DNL......Page 257 7.3.3 Monotonicity and Missing Codes......Page 259 7.4.1 Conversion Time, Recovery Time, and Sampling Frequency......Page 261 7.4.3 Sparkling......Page 263 7.5.3 Data Transmission......Page 264 Problems......Page 265 References......Page 267 8.1.1 Traditional versus DSP-Based Testing of AC Parameters......Page 269 8.2.2 Sampling: Continuous-Time and Discrete-Time Representation......Page 270 8.2.3 Reconstruction......Page 274 8.2.4 The Sampling Theorem and Aliasing......Page 278 8.2.5 Quantization Effects......Page 281 8.2.6 Sampling Jitter......Page 287 8.3.1 Finite and Infinite Sample Sets......Page 294 8.3.2 Coherent Signals and Noncoherent Signals......Page 295 8.3.3 Peak-to-RMS Control in Coherent Multitones......Page 297 8.3.4 Spectral Bin Selection......Page 298 8.4.1 Simultaneous Testing of Multiple Sampling Systems......Page 303 8.4.2 ATE Clock Sources......Page 304 Problems......Page 306 References......Page 308 9.1.1 Reduced Test Time......Page 309 9.2.1 DSP and Array Processing......Page 310 9.2.2 Fourier Analysis of Periodic Signals......Page 311 9.2.3 The Trigonometric Fourier Series......Page 312 9.2.4 The Discrete-Time Fourier Series......Page 315 9.2.5 Complete Frequency Spectrum......Page 325 9.2.6 Time and Frequency Denormalization......Page 328 9.2.7 Complex Form of the DTFS......Page 329 9.3.1 The Discrete Fourier Transform......Page 331 9.3.2 The Fast Fourier Transform......Page 335 9.3.3 Interpreting the FFT Output......Page 336 9.3.4 Windowing......Page 344 9.4.1 Equivalence of Time- and Frequency-Domain Information......Page 356 9.4.2 Parseval's Theorem......Page 359 9.4.3 Frequency-Domain Filtering......Page 360 9.4.4 Noise Weighting......Page 361 9.5 Summary......Page 362 Problems......Page 363 References......Page 367 10.1.1 Types of Analog Channels......Page 368 10.2.1 Absolute Voltage Levels......Page 369 10.2.2 Absolute Gain and Gain Error......Page 373 10.2.4 PGA Gain Tests......Page 375 10.2.5 Frequency Response......Page 380 10.3.1 Phase Response......Page 388 10.3.2 Group Delay and Group Delay Distortion......Page 392 10.4.1 Signal-to-Harmonic Distortion......Page 394 10.4.2 Intermodulation Distortion......Page 397 10.4.3 Adjacent Channel and Noise Power Ratio Tests......Page 398 10.5.1 Common-Mode Rejection Ratio......Page 400 10.5.2 Power Supply Rejection and Power Supply Rejection Ratio......Page 402 10.5.3 Channel-to-Channel Crosstalk......Page 404 10.5.4 Clock and Data Feedthrough......Page 407 10.6.2 Idle Channel Noise......Page 408 10.6.3 Signal to Noise, Signal to Noise and Distortion......Page 410 10.7 Summary......Page 413 Problems......Page 414 11.1.1 What are Sampled Channels?......Page 418 11.1.2 Examples of Sampled Channels......Page 419 11.1.3 Types of Sampled Channels......Page 421 11.2.1 DUT Sampling Rate Constraints......Page 423 11.2.2 Digital Signal Source and Capture......Page 424 11.2.3 Simultaneous DAC and ADC Channel Testing......Page 428 11.2.4 Mismatched Fundamental Frequencies......Page 431 11.2.5 Reconstruction Effects in DACs, AWGs, and other Sampled-Data Circuits......Page 435 11.3 Undersampling and Aliasing......Page 439 11.3.1 Reconstructing the High-Frequency Signal from the Aliased Sample Set......Page 441 11.4.1 Signal Creation and Analysis......Page 447 11.4.2 Intrinsic 儀甀愀渀琀椀稀愀琀椀漀渀 Errors Associated with the DAC Operation......Page 448 11.5.1 Similarity to Analog Channel Tests......Page 451 11.5.2 Absolute Level, Absolute Gain, Gain Error, and Gain Tracking......Page 453 11.5.3 Frequency Response......Page 457 11.5.4 Phase Response 䄀戀猀漀氀甀琀攀 倀栀愀猀攀 匀栀椀昀琀......Page 460 11.5.6 Signal to Harmonic Distortion and Intermodulation Distortion......Page 461 11.5.7 Crosstalk......Page 462 11.5.10 Signal-to-Noise Ratio and ENOB......Page 463 11.5.11 Idle Channel Noise......Page 464 Problems......Page 465 References......Page 468 12.1 Introduction to RF Testing......Page 469 12.2.1 Wave Definition of Electrical Signals......Page 471 12.2.2 Measures of Electrical Waves......Page 472 12.2.3 Power Definition......Page 475 12.2.4 Crest Factor......Page 479 12.2.5 Power in dBm......Page 482 12.2.6 Power Transfer......Page 483 12.2.6.1 Maximum Power Transfer......Page 484 12.2.7 Conjugate and Reflectionless Matching......Page 487 12.2.8.1 Insertion Loss......Page 488 12.2.8.2 Transducer Loss......Page 489 12.3 Noise......Page 490 12.3.1.1 Thermal Noise......Page 492 12.3.1.3 Flicker Noise......Page 493 12.3.2 Noise Figure......Page 494 12.3.3.1 Fundamentals......Page 497 12.3.3.2 Spectral Density of Phase Fluctuations......Page 498 12.3.3.3 Spectral Density of Frequency Fluctuations......Page 501 12.3.3.5 Jitter and Integrated Phase Noise......Page 502 12.4.1 Principles of S-Parameters of a Two-Port Network......Page 504 12.4.2.1 Voltage Standing Wave Ratio......Page 509 12.4.2.2 Reflection Coefficient......Page 511 12.4.2.3 Return Loss......Page 512 12.4.2.4 Mismatch Loss......Page 513 12.4.2.5 Mismatch Uncertainty......Page 514 12.4.2.6 Reducing Measurement Uncertainty......Page 521 12.4.2.7 Insertion Loss......Page 524 12.5.1.1 Amplitude Modulation......Page 527 12.5.1.2 Frequency Modulation......Page 529 12.5.1.3 Phase Modulation......Page 532 12.5.2 Digital Modulation......Page 534 12.5.2.2 Frequency Shift Keying......Page 535 12.5.2.4 Constellation Diagram......Page 536 12.5.4 Orthogonal Frequency Division Multiplexing......Page 537 12.6 Summary......Page 539 Problems......Page 540 References......Page 542 13. RF Test Methods......Page 544 13.1.1.1 Calorimetric Power Sensor......Page 545 13.1.1.2 Superheterodyne Power Sensor......Page 546 13.1.1.3 Zero-IF with Sampling Power Sensor......Page 547 13.1.2 Gain Measurement......Page 551 13.1.3 Scalar Power Measures versus Time......Page 559 13.1.4 Intermodulation Measurement......Page 561 13.1.5.2 Binary Search Method......Page 566 13.1.5.3 Interpolation Method......Page 567 13.1.5.4 Modulation Method......Page 570 13.2.1 Principles of a Directional Coupler......Page 571 13.2.2 Directional Couplers on an ATE......Page 573 13.3.1 Noise Figure and Noise Factor Definition......Page 574 13.3.2 Noise Measurement Technique with the Y-Factor Method......Page 576 13.3.4 Comparison of the Noise Figure Test Methods......Page 578 13.4 Phase Noise......Page 580 13.4.1 Measuring Phase Noise Using Spectral Analysis......Page 581 13.4.2 PLL-Based Phase Noise Test Method......Page 586 13.4.3 Delay-Line Phase Noise Test Method......Page 588 13.5 Vector Signal Analysis......Page 589 13.5.2 Test of Relative Phase......Page 591 13.5.3 Error Vector Magnitude Test Method......Page 596 13.5.4 Adjacent Channel Power Tests......Page 598 13.5.4.1 Modulated Sources......Page 599 13.5.4.2 Modulation Measurements......Page 600 13.5.6 Bit Error Rate......Page 601 13.6 Summary......Page 603 Problems......Page 604 References......Page 607 14.1 Synchronous and Asynchronous Communications......Page 608 14.2 Time-Domain Attributes of a Clock Signal......Page 610 14.3 Frequency-Domain Attributes of a Clock Signal......Page 615 14.4 Communicating Serially over a Channel......Page 621 14.4.1 Ideal Channel......Page 622 14.4.2 Real Channel Effects......Page 623 14.4.2.1 Noisy Channel......Page 624 14.4.2.2 Dispersive Channel......Page 625 14.4.2.4 Jitter Classifications......Page 628 14.4.3.1 Received Voltage Decision Level, VTH......Page 629 14.4.3.2 Received Zero-Crossing Decision Level, t_TH......Page 632 14.4.3.3 Combined Effect of Varying Received Voltage Level Decision V_TH and Zero-Crossing Decision Level, t_TH......Page 633 14.5 Bit Error Rate Measurement......Page 634 14.5.1 PRBS Test Patterns......Page 640 14.6.1 Amplitude-Based Scan Test......Page 644 14.6.2 Time-Based Scan Test......Page 651 14.6.3 Dual-Dirac Jitter Decomposition Method......Page 653 14.6.3.1 Total Jitter Definition......Page 659 14.6.4 Gaussian Mixture Jitter Decomposition Method......Page 661 14.7.1 Period and Sinusoidal Jitter 倀䨀一匀䨀......Page 667 14.7.2 Data-Dependent Jitter 䐀䐀䨀......Page 670 14.7.3 Bounded and Uncorrelated Jitter 䈀唀䨀......Page 672 14.8.1 Jitter Transfer Test......Page 678 14.8.1.1 Coherent Jitter Generation......Page 679 14.8.1.2 Coherent Phase Extraction Using Analytic Signal Representation......Page 682 14.8.1.3 Final Comments......Page 688 14.8.2 Jitter Tolerance Test......Page 689 14.9 Summary......Page 696 Problems......Page 697 References......Page 703 15.1.1 Purpose of a Device Interface Board......Page 704 15.1.2 DIB Configurations......Page 706 15.2.1 Prototype DIBs versus PCB DIBs......Page 707 15.2.2 PCB CAD Tools......Page 708 15.2.3 Multilayer PCBs......Page 709 15.2.4 PCB Materials......Page 710 15.3.2 Trace Resistance......Page 711 15.3.3 Trace Inductance......Page 712 15.3.4 Trace Capacitance......Page 717 15.3.5 Shielding......Page 723 15.3.6 Driven Guards......Page 724 15.4.1.1 Coaxial Line......Page 725 15.4.1.3 Microstrip Line......Page 726 15.4.1.5 Coupled Transmission Lines......Page 727 15.4.2 Transmission Line Discontinuities......Page 728 15.4.3 Lumped- and Distributed-Element Models......Page 729 15.4.4 Transmission Line Termination......Page 733 15.4.5 Parasitic Lumped Elements......Page 737 15.5.1 Introduction to the Smith Chart......Page 738 15.5.2 Impedance Smith Chart......Page 740 15.5.3 Admittance Smith Chart......Page 743 15.5.4 Immitance Smith Chart......Page 744 15.5.5 Impedance Transformation with Discrete Components on Smith Chart......Page 745 15.5.6 Impedance Matching with a Series and Shunt Component Using the Immitance Smith Chart......Page 748 15.6.1 Grounding......Page 751 15.6.2 Power Distribution......Page 752 15.6.3 Power and Ground Planes......Page 753 15.6.4 Ground Loops......Page 755 15.7.1 DUT Sockets and Contactor Assemblies......Page 756 15.7.2 Contact Pads, Pogo Pins, and Socket Pins......Page 757 15.7.3 Electromechanical Relays......Page 759 15.7.4 Socket Pins......Page 761 15.7.5 Resistors......Page 762 15.7.6 Capacitors......Page 764 15.7.7 Inductors and Ferrite Beads......Page 768 15.7.8 Transformers and Power Splitters......Page 771 15.8.2 Instrumentation Amplifiers......Page 772 15.8.3 V_MID Reference Adder......Page 774 15.8.4 Current-to-Voltage and Voltage-to-Current Conversions......Page 775 15.8.5 Power Supply Ripple Circuits......Page 776 15.9.2 Crosstalk......Page 778 15.9.4 Resistive Drops in Circuit Traces......Page 779 15.9.7 Poor DIB Component Placement and PCB Layout......Page 780 Problems......Page 781 References......Page 783 16.1.1 What is DfT?......Page 784 16.1.3 Differences between Digital DfT and Analog DfT......Page 785 16.2.1 Lower Cost of Test......Page 786 16.2.3 Diagnostics and Characterization......Page 788 16.3.1 Scan Basics......Page 789 16.3.2 IEEE Std. 1149.1 Standard Test Access Port and Boundary Scan......Page 790 16.3.3 Full Scan and Partial Scan......Page 793 16.4.1 Pseudorandom BILBO Circuits......Page 794 16.4.2 Memory BIST......Page 796 16.5.1 Partitioning......Page 797 16.5.2 Digital Resets and Presets......Page 798 16.5.3 Device-Driven Timing......Page 799 16.6.1 Mixed-Signal Boundary Scan 䤀䔀䔀䔀 匀琀搀⸀ ㄀㄀㐀㤀⸀㐀......Page 801 16.6.2 Analog and Mixed-Signal BIST......Page 803 16.7.1 Common Concepts......Page 804 16.7.2 Accessibility of Analog Signals......Page 805 16.7.3 Analog Test Buses, T-Switches, and Bypass Modes......Page 806 16.7.4 Separation of Analog and Digital Blocks......Page 808 16.7.6 Precharging Circuits and AC Coupling Shorts......Page 811 16.7.8 PLL Testability Circuits......Page 813 16.7.9 DAC and ADC Converters......Page 814 16.8.1 RF Loopback Test......Page 815 16.8.2 RF BIT and BIST......Page 816 16.8.3 Correlation-Based Test......Page 818 16.8.3.1 DC-to-RF Correlation......Page 819 16.8.3.2 Analog-to-RF Correlation......Page 820 Problems......Page 821 References......Page 823 Appendix A: Gaussian Cumulative Distribution Function Values Phi 稀......Page 826 Answers to Problems......Page 827 A......Page 841 B......Page 844 C......Page 845 D......Page 849 E......Page 852 F......Page 854 G......Page 856 H......Page 857 I......Page 858 L......Page 860 M......Page 862 N......Page 864 O......Page 865 P......Page 866 R......Page 870 S......Page 872 T......Page 878 U......Page 880 V......Page 881 W......Page 882 Z......Page 883 With the proliferation of complex semiconductor devices containing digital, analog, mixed-signal, and radio-frequency circuits, today's engineer must be fluent in all four circuit types. Written for advanced undergraduate and graduate-level students, as well as engineering professionals, An Introduction to Mixed-Signal IC Test and Measurement , Second Edition, encompasses analog, mixed-signal and radio-frequency circuits tests, with many relevant industrial examples. The text assumes a solid background in analog and digital circuits and a working knowledge of computers and computer programming. An Introduction to Mixed-Signal IC Test and Measurement , Second Edition, includes examples and illustrations--featuring state-of-the-art industrial technology--to enrich and enliven the text. The book also introduces large-scale mixed-signal circuit and individual circuit tests, discusses the value-added benefits of mixed-signal IC testing to a manufacturer's product, and clearly defines the role of the test engineer. New to This Edition * A new chapter on RF Test Methods and Fundamentals of RF Testing * A new chapter on Clock and Serial Data Communications Channel Measurements * Coverage of RF load board design * New coverage of probabilistic reasoning for mixed-signal testing With the proliferation of complex semiconductor devices containing digital, analog, mixed-signal, and radio-frequency circuits, today's engineer must be fluent in all four circuit types. Written for advanced undergraduate and graduate-level students, as well as engineering professionals, An Introduction to Mixed-Signal IC Test and Measurement, Second Edition, encompasses analog, mixed-signal and radio-frequency circuits tests, with many relevant industrial examples. The text assumes a solid background in analog and digital circuits and a working knowledge of computers and computer programming.
An Introduction to Mixed-Signal IC Test and Measurement, Second Edition, includes examples and illustrations--featuring state-of-the-art industrial technology--to enrich and enliven the text. The book also introduces large-scale mixed-signal circuit and individual circuit tests, discusses the value-added benefits of mixed-signal IC testing to a manufacturer's product, and clearly defines the role of the test engineer. "With the proliferation of complex semiconductor devices containing digital, analog, mixed-signal and radio-frequency circuits, the economics of test has come to the forefront and today's engineer needs to be fluent in all four circuit types. Having access to a book that covers these topics will help the evolving test engineer immensely and will be an invaluable resource. In addition, the second edition includes lengthy discussion on RF circuits, high-speed I/Os and probabilistic reasoning. Appropriate for the junior/senior university level, this textbook includes hundreds of examples, exercises and problems"--Provided by publisher Annotation With the proliferation of complex semiconductor devices containing digital, analog, mixed-signal and radio-frequency circuits, the economics of test has come to the forefront and today's engineer needs to be fluent in all four circuit types. Having access to a book that covers these topicswill help the evolving test engineer immensely and will be an invaluable resource. In addition, the second edition includes lengthy discussion on RF circuits, high-speed I/Os and probabilistic reasoning. Appropriate for the junior/senior university level, this textbook includes hundreds of examples, exercises and problems