A Tutorial Introduction to VHDL Programming

This book helps readers create good VHDL descriptions and simulate VHDL designs. It teaches VHDL using selected sample problems, which are solved step by step and with precise explanations, so that readers get a clear idea of what a good VHDL code should look like. The book is divided into eight chapters, covering aspects ranging from the very basics of VHDL syntax and the module concept, to VHDL logic circuit implementations. In the first chapter, the entity and architecture parts of a VHDL program are explained in detail. The second chapter explains the implementations of combinational logic circuits in VHDL language, while the following chapters offer information on the simulation of VHDL programs and demonstrate how to define data types other than the standard ones available in VHDL libraries. In turn, the fifth chapter explains the implementation of clocked sequential logic circuits, and the sixth shows the implementation of registers and counter packages. The book’s last two chapters detail how components, functions and procedures, as well as floating-point numbers, are implemented in VHDL. The book offers extensive exercises at the end of each chapter, inviting readers to learn VHDL by doing it and writing good code. Contents 5 1 Entity, Architecture and VHDL Operators 8 1.1 Entity 8 1.2 The Data Types Used in Input/Output Ports 13 1.3 Architecture 21 1.4 Data Objects 26 1.4.1 Constant Object 26 1.4.2 Signal Object 29 1.4.3 Variable Object 30 1.5 VHDL Operators 32 1.5.1 Assignment Operators 32 1.5.2 Logical Operators and Shift Operators 33 1.5.3 Relational Operators 36 1.5.4 Arithmetic Operators 36 1.5.5 Concatenation Operator “&” 39 1.5.6 Generic Statement 40 2 Combinational Logic Circuit Design and Concurrent Coding in VHDL 44 2.1 “When” and “Select” Statements 44 2.2 Generate Statement 49 2.3 Examples for Combinational Circuits Implemented in VHDL 52 3 Simulation of VHDL Programs 85 3.1 Test-Bench Writing 85 4 User Defined Data Types, Arrays and Attributes 105 4.1 User Defined Data Types 105 4.1.1 Enumerated Types 106 4.2 User Defined Array Data Types 107 4.2.1 Constrained Arrays 107 4.2.2 Unconstrained Arrays 109 4.2.3 Defining PORT Arrays 111 4.3 Defining 2D Arrays or Matrices 113 4.3.1 Matrix as Column Wise Concatenated Row Vectors 113 4.3.2 Matrix as Table of Numbers 116 4.3.3 3D Arrays 117 4.4 Subtypes 119 4.4.1 Type Conversion 119 4.5 Attributes of Data Types 120 4.5.1 Attributes for Scalar Data Types 121 4.5.2 Attributes for Array Data Types 123 4.5.3 Attributes for Signal Objects 125 5 Sequential Circuit Implementation in VHDL 128 5.1 Sequential Circuits in VHDL 128 5.1.1 Process 129 5.1.2 IF Statement 129 5.2 Example Implementations for Sequential Logic Units 130 5.2.1 D-Type Flip Flop 130 5.2.2 Multiplexer 135 5.2.3 JK and T Flip-Flops 136 5.2.4 Counter 138 5.2.5 Clock Divider (Frequency Divider) 140 5.2.6 BCD to SS Converter with 1 s BCD Counter 148 5.3 The Wait Statement 150 5.3.1 Wait Until 150 5.3.2 Wait on 151 5.4 Case Statement 152 5.5 Loop Statements 154 5.5.1 Next and Exit Statements 154 5.6 Example Sequential Logic Circuit Implementation in VHDL 155 6 VHDL Implementation of Logic Circuits Involving Registers and Counters 169 6.1 Shift Registers 169 6.1.1 Shift Register with Parallel Load 172 6.1.2 Logic Circuits Involving Shift Registers and Counter 174 6.1.3 Serial Transfer Unit 178 6.1.4 Serial Adder Unit 181 7 Packages, Components, Functions and Procedures 193 7.1 Packages 193 7.2 Components 195 7.3 Functions and Procedures 209 7.3.1 Functions 209 7.3.2 Operator Overloading 215 7.4 Procedures 216 7.4.1 Differences Between a Function and a Procedure 218 8 Fixed and Floating Point Numbers 221 8.1 Fixed Point Numbers 221 8.1.1 Type Conversion Functions 225 8.1.2 Operators for Fixed Point Numbers 226 8.1.3 Arithmetic Operations with Fixed Point Numbers and Sizing Rules 227 8.1.4 Automatic Resizing 228 8.1.5 Resize Function 230 8.1.6 Add Cary Procedure 232 8.1.7 Divide Function 234 8.1.8 Reciprocal Function 234 8.1.9 Remainder Function 235 8.1.10 Scalb Function 236 8.1.11 Maximum and Minimum Function 237 8.1.12 ‘Find Left Most’ and ‘Find Right Most’ Functions 238 8.1.13 ABS Function 239 8.2 Floating Point Numbers 240 8.2.1 Floating Point Type Conversion Functions 242 8.2.2 Operators for Floating Point Numbers 247 8.2.3 Copysign Function 248 8.2.4 Scalb Function 248 8.2.5 Logb Function 249 Bibliography 251 Index 252 Front Matter ....Pages i-vii Entity, Architecture and VHDL Operators (Orhan Gazi)....Pages 1-36 Combinational Logic Circuit Design and Concurrent Coding in VHDL (Orhan Gazi)....Pages 37-77 Simulation of VHDL Programs (Orhan Gazi)....Pages 79-98 User Defined Data Types, Arrays and Attributes (Orhan Gazi)....Pages 99-121 Sequential Circuit Implementation in VHDL (Orhan Gazi)....Pages 123-163 VHDL Implementation of Logic Circuits Involving Registers and Counters (Orhan Gazi)....Pages 165-188 Packages, Components, Functions and Procedures (Orhan Gazi)....Pages 189-216 Fixed and Floating Point Numbers (Orhan Gazi)....Pages 217-246 Back Matter ....Pages 247-251